Board Update Portal; Connecting To The Board Update Portal - Intel Stratix 10 GX User Manual

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7 Board Update Portal

7 Board Update Portal
The Intel Stratix 10 GX transceiver signal integrity development kit ships with the
Board Update Portal design example stored in the factory portion of the flash memory
on the board. The design consists of a Nios II embedded processor, an Ethernet MAC
and an HTML web server.
When you power up the board with the SW6.1
Intel Stratix 10 GX FPGA configures with the Board Update Portal design example. The
design can obtain an IP address from any DHCP server and serve a webpage from the
flash on your board to any host computer on the same network. The webpage allows
you to upload a new FPGA design to the user portion of flash memory and provides
links to useful information on the Intel website, including kit-specific links and design
resources.
After successfully updating the user flash memory, you can load the user design from
flash memory into the FPGA by setting SW6.1 to ON(0) position and power cycle the
board. The source code for the Board Update Portal resides in the
\examples\board_update_portal

7.1 Connecting to the Board Update Portal

Before you begin
This section provides instructions to connect to the Board Update Portal webpage.
Before you proceed, ensure that you have the following:
A PC with a connection to a working Ethernet port on a DHCP enabled network.
A separate working Ethernet port connected to the same network for the board.
The Ethernet, power cables and development board that are included in the kit.
Connecting to the Board Update Portal
To connect to the Board Update Portal webpage, please perform the following steps:
1. Install the latest Intel software tools, including Intel Quartus Prime software, Nios
II processor and IP blocks.
2. Set SW6.1 to OFF(1) position with the board powered down.
3. Attach the Ethernet cable from the board to your LAN.
4. Power up the board. The board connects to the LAN's gateway router and obtains
an IP address. The LCD on the board displays the IP address.
5. Launch a web browser on a PC that is connected to the same network and enter
the IP address from the LCD into the web browser's address bar. The Board
Update Portal webpage appears in the web browser
Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, Nios, Quartus
and Stratix words and logos are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other
countries. Intel warrants performance of its FPGA and semiconductor products to current specifications in
accordance with Intel's standard warranty, but reserves the right to make changes to any products and services
at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Intel. Intel
customers are advised to obtain the latest version of device specifications before relying on any published
information and before placing orders for products or services.
*Other names and brands may be claimed as the property of others.
FACTORY_LOAD
directory.
to OFF(1) position,
<package dir>
ISO
9001:2008
Registered

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