Setup Elements - Intel Stratix 10 GX User Manual

Board Reference
D2
D3
D4
D7
D8
D9
D10
D11
D27

4.6 Setup Elements

This development board includes several different kinds of setup elements. This
section describes the following setup elements:
• JTAG Chain Device removal switch
• Program Select pushbutton
• MAX V Reset pushbutton
• CPU Reset pushbutton
JTAG Chain Device Removal Switch
The JTAG chain connects the Intel Stratix 10 GX FPGA, the MAX V CPLD, FMC A and
FMC B in a chain, with the option to selectively bypass each JTAG node by four dip
switch setting.
Program Select Pushbutton
After a
POWER-ON
Stratix 10 GX FPGA in the AvST mode with either the
DEFINED POF
selected by the
program LEDs (
PGM_CONFIG
® ®
Intel Stratix 10 GX Transceiver Signal Integrity Development Kit User Guide
28
Signal Name
JTAG_TX
SC_RX
SC_TX
ENET_LED_TX
ENET_LED_RX
ENET_LED_LINK1000
ENET_LED_LINK100
ENET_LED_LINK10
OVERTEMPn
or (reconfiguration) event, the MAX V configures the Intel
RESET
depending on
FACTORY_LOAD
pushbutton. Pressing this pushbutton and observing the
PGMSEL
or ) dictates the program selection. Then, the
FACTORY USER
pushbutton must be pressed to load the program.
Description
Green LED. JTAG transmitter activity
indicator.
Green LED. System console receiver
activity indicator.
Green LED. System console
transmittter activity indicator.
Green LED. Blinks to indicate Ethernet
PHY transmit activity.
Green LED. Blinks to indicate Ethernet
PHY activity.
Green LED. Illuminates to indicate
Ethernet linked at 1000 Mbps
connection speed.
Green LED. Illuminates to indicate
Ethernet linked at 100 Mbps connection
speed.
Green LED. Illuminates to indicate
Ethernet linked at 10 Mbps connection
speed.
Amber LED. Intel Stratix 10 over
temperature indicator.
FACTORY POF
setting. The setting of the
4 Board Components
or a
USER-
bit is
PGMSEL