Board Component Blocks - Intel Arria 10 User Manual

Soc development kit
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1.2. Board Component Blocks

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Intel
Arria
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The development board features the following major component blocks:
Arria 10 Soc (10AS066N3F40E2SG) in a 1517-pin FBGA (FineLine Ball-Grid Array)
package
FPGA configuration circuitry
— Active Serial (AS) x1 or x4 configuration (EPCQ1024L)
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— MAX
V CPLD (5M2210ZF256) in a 256-pin FBGA package as the system
controller
— MAX V CPLD (5M2210ZF256) in a 256-pin FBGA package as the I/O multiplier
CPLD
Clocking circuitry
— SI5338 programmable oscillator
— LMK04828 clock cleaner
— HPS clock options: 25 MHz, 33 MHz, and SMA input (2V5 LVCMOS)
— SI5112 100MHz clock generator for PCIe interface
— SI516 148.5 MHz voltage control oscillator for SDI interface
Supported Memory
— HPS memory size (HILO card):
2GB DDR3 (256Mb x 40 x dual rank)
1GB DDR3 (256Mb x 40 x single rank)
1GB DDR4 (256Mb x 40 x single rank) - ships with kit
— FPGA memory size (HILO Card):
4GB DDR3 (256Mb x72 x dual rank)
2GB DDR3 (256Mb x72 x single rank)
2GB DDR4 (256Mb x 72 x single rank) - ships with kit
16MB QDRV (4Mb x 36)
128MB RLDRAM3(16Mb x 72)
— HPS Boot Flash (Flash card):
NAND flash (x8) : 128MB (MT29F1G08ABBEAH4) - ships with kit
QSPI flash: 128MB (MT25QU01GBBA8E12-0SIT) - ships with kit
SD Micro flash card: 4GB (Kingston) - ships with kit
— Optional FPGA File Flash (Flash card):
NAND flash (x8): 128MB (MT29F1G08ABBEAH4)
QSPI flash: 128MB (MT25QU01GBBA8E12-0SIT)
SD Micro flash card: 4GB (Kingston)
10 SoC Development Kit User Guide
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®
1. Intel
Arria
10 SoC Development Kit Overview
683227 | 2023.07.12
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