Thermal Limitations And Protection Guidelines - Intel Stratix 10 GX User Manual

Figure 13. Power Sequence Waveforms
EN_VCCRAM, EN_VCCRL_GXB,
EN_VCCRR_GXB, EN_VCCT_GXB
S10_VCCERAM, S10_VCCRL,
FMCA_VADJ, FMCB_VADJ, 2.5V, 3.3V
EN_VCCH_GXB, EN_VCCERAM,
EN_VCCRL_GXB, EN_VCCRR_GXB,
EN_VCCT_GXB, EN_VCCH_GXB
EN_VCC, EN_12V, EN_1V8, EN_3V3

5.5 Thermal Limitations and Protection Guidelines

With 25C ambient temperature and 50C printed circuit board (PCB) temperature, you
must ensure that your FPGA designs do not consume more than 200 W with the liquid
cooling solution.
MAX1619 chip is connected to the Intel Stratix 10 GX FPGA internal temperature diode
to continuously monitor FPGA die temperature. In the meantime, a dedicated FPGA
TSD real-time monitor solution under
transceiver example design to monitor the temperatures of both FPGA core and each
transceiver tile. Based on the data from both MAX1619 and FPGA, MAX V will run fan
at its maximum speed whenever any temperature is over 60C or immediately power
off the board whenever any temperature is over 100C. Remember to unplug the power
supply when the board is powered off after the temperature crosses 100C. Plug the
power supply back again to ensure that the board can be normally turned on/off
again.
® ®
Intel Stratix 10 GX Transceiver Signal Integrity Development Kit User Guide
46
12V_DCIN
12V_IN
3.3V_STBY
Start
EN_12V, EN_1V8
12V, 1.8V_PRE
5 V
EN_3V3
3.3V_PRE
EN_VCC
S10_VCC
S10_VCCRR, S10_VCCT
EN_VCCH_GXB
S10_VCCH, 1.8V
EN_VCCIO
12V_IN
or
START
EN_VCCIO, FPGA_nCONFIG,
LT Power Management Starts work
PWR MAX 10 MGMT Starts work
~\ip\onchip_sensors\
5 System Power
Stratix 10 FPGA Exits POR
12V_IN below 11 V
12V_IN below 5 V
is added to each