Preparing The Board; Running The Board Test System - Intel Stratix 10 GX User Manual

Figure 15. About BTS

6.1 Preparing the Board

Several designs are provided to test the major board features. Each design provides
data for one or more tabs in the BTS. The Configure Menu identifies the appropriate
design to download to the FPGA for each tab.
After successful FPGA configuration, the appropriate tab appears and allows you to
exercise the related board features. Highlights appear in the board picture around the
corresponding components.
The BTS shares the JTAG bus with other applications like Nios II debugger and the
Signal Tap II Embedded Logic Analyzer. As the Intel Quartus Prime Programmer uses
most of the bandwidth of the JTAG bus, other applications using the JTAG bus might
time out. Be sure to close the other applications before attempting to reconfigure the
FPGA using the Intel Quartus Prime Programmer.

6.2 Running the Board Test System

Before you begin
The BTS relies on the Intel Quartus Prime software's specific library. Before running
the BTS, open the Intel Quartus Prime software to automatically set the enviromment
variable
$QUARTUS_ROOTDIR
Intel Quartus Prime library. The version of Intel Quartus Prime software set in the
$QUARTUS_ROOTDIR
example, the Development Kit Installer version 17.0IR3 requires that the Intel
Quartus Prime software 17.0IR1 or later version to be installed.
Also, to ensure that the FPGA is configured successfully, you should install the latest
Intel Quartus Prime software that can support the silicon on the development kit. For
this board, Intel recommends you install Intel Quartus Prime version
Please refer to the
directory.
® ®
Intel Stratix 10 GX Transceiver Signal Integrity Development Kit User Guide
48
. The BTS uses this environment variable to locate the
environment variable should be newer than version 17.0. For
file under
README.txt examples\board_test_system
6 Board Test System
.
17.1ir2.b50