Mitsubishi Q01CPU User Manual page 686

12
TROUBLESHOOTING
(20)Redundant power supply module information
Number Name Meaning
Power supply
Power supply off
SD1780 off detection
detection status
status
Power supply Power supply
SD1781 failure detection failure detection
status status
Momentary
power failure
Momentary power
detection
failure detection
SD1782
counter for
count for power
power supply
supply 1
*1
1
Momentary
power failure
Momentary power
detection
failure detection
SD1783
counter for
count for power
power supply
supply 2
*1
2
*1: The "power supply 1" indicates the redundant power supply module mounted on the POWER 1 slot of the redundant base unit (Q38RB/68RB/Q65WRB).
The "power supply 2" indicates the redundant power supply module mounted on the POWER 2 slot of the redundant base unit (Q38RB/68RB/Q65WRB).
*2: The module whose first 5 digits of serial No. is 07032 or later.
However, for the multiple CPU system configuration, this applies to all CPU modules whose first 5 digits of serial No. are 07032 or later.
*3: The module whose first 5 digits of serial No. is 10042 or later.
12
- 362 12.8 Special Register List
SD1780 to SD1789 are valid only for a redundant power supply system.
The bits are all 0 for a singular power supply system.
Table12.63 Special register
• Stores the status of the redundant power supply module with input
power OFF in the following bit pattern.
• Stores 0 when the main base unit is not the redundant power main base
unit (Q38RB).
Input power OFF Input power OFF
detection status of detection status of
1
power supply 2 power supply 1
b15 to b9 b8 b7
to
SD1780
• When configuring multiple CPU, the status is stored to 1st CPU module.
• Stores the failure detection status of the redundant power supply module
in the following bit pattern. (The corresponding bit is cleared to 0 when
the input power to the faulty redundant power supply module is switched
OFF after detection of the redundant power supply module failure.)
• Stores 0 when the main base unit is not the redundant power main base
unit (Q38RB).
Failure detection Failure detection
status of power
status of power
1
supply 2
b15 to b9 b8 b7
to
SD1781
• When configuring multiple CPU, the status is stored to 1st CPU module.
• Counts the number of times of momentary power failure of the power
supply 1/2.
• Monitors the status of the power supply 1/ 2 mounted on the redundant
power main base unit (Q38RB) and counts the number of times of
momentary power failure.
Status of power supply 1/power supply 2 mounted on the redundant
power extension base unit is not monitored.
• When the CPU module starts, the counter of the power supply 1/ 2 is
cleared to 0.
• If the input power to one of the redundant power supply modules is
turned OFF, the corresponding counter is cleared to 0.
• The counter is incremented by 1 every time the momentary power failure
of the power supply 1/ 2 is detected.(The counter repeats increment and
decrement of the value; 0
of GX Developer shows the counter within the range between 0 and
65535.)
(0 to 65535: When the count exceeds 65535, it starts with 0.)
• Stores 0 when the main base unit is not the redundant power main base
unit (Q38RB).
• When configuring multiple CPU, the status is stored to 1st CPU module.
• The counter repeats increment and decrement of the value,
0 32767 -32768 0(The system monitor of GX Developer shows
the counter within the range between 0 and 65535.)
Explanation
Each bit
1
0: Input power ON status/ No
redundant power supply
to b1 b0
module
to 1: Input power OFF status
Main base unit
Extension base unit 1st stage
:
Extension base unit 7th stage
Main base unit
Extension base unit 1st stage
:
Extension base unit 7th stage
1 Each bit
supply 1
0: Redundant power supply
module failure not
to b1 b0
detected/No redundant power
to
supply module
1: Redundant power supply
module failure detected
(Detectable for redundant
power supply module only)
Main base unit
Extension base unit 1st stage
:
Extension base unit 7th stage
Main base unit
Extension base unit 1st stage
:
Extension base unit 7th stage
32767 -32768 0(The system monitor
Corres-
ponding
Set by Corresponding
ACPU
(When Set)
D9
S(Every END) New
S(Every END) New
S(Every END) New
S(Every END) New
CPU
*2
Qn(H)
*2
QnPH
QnPRH
*3
QnU
Rem