Integra DTR-7.8 Service Manual page 61

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SCHEMATIC DIAGRAM-18(SD-18)
WAVEFORM SECTION
1
NOTE:
1. WF01 is short for Waveform01 .
2. Refer to SD-9(SCHEMATIC DIAGRAM-9)
for the location of each waveform on circuit.
3. SD-x:XY is short for Shcematic Diagram-x and
each socket's location, X=A to H, Y=1 to 5.
OPT1
WF01
2
Duty varies according to audio data
WF04
SAI_LRCK
TE
L 13942296513
3
20.8us
WF07
CX_LRCK
4
20.8us
WF10 AUDIO_FL
Analog audio waveform with aliasing noise
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5
.
http://www.xiaoyu163.com
B
Digital Audio Waveform Part
WF02
(SD-9:B2)
4.0V
WF05
(SD-9:B4)
3.3V
WF08
(SD-9:D4)
3.3V
(SD-9:F3)
WF10
2.8V
0V
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y
i
http://www.xiaoyu163.com
8
LR CLOCK (SAI_LRCK, CX_LRCK)
Fs=48kHz : DVD, Clock width=20.8us
Fs=44.1kHz : CD, Clock width=22.7us
BIT CLOCK (SAI_SLCK, CX_SLCK)
64Fs=3072kHz : DVD, Clock width=325ns
64Fs=2822.4kHz : CD, Clock width=354ns
(SD-9:C2)
COAX1
5.0V
Duty always varies according to audio data
SAI_SLCK (SD-9:C4)
Q Q
3 6 7 1 3
3.3V
325 ns
(SD-9:D4)
CX_SCLK
3.3V
325 ns
AUDIO_FL (SD-9:F3)
220mVp-p
Aliasing noise in no audio data
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.
C
2 9 9 4 2 8
(SD-9:B4)
WF03 SAI_SDOUT
Duty varies according to audio data
WF06 CX_SDIN1 (SD-9:D4)
1 5 0 5 8 2 9 9 4
20.8us
WF09 (SD-9:E4)
DAC_OUT-
2.8V
0V
Analog audio waveform with aliasing noise
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co
DTR-7.8
D
9 9
3.3V
2 8 9 9
3.3V