Integra DTR-7.8 Service Manual page 128

QQ
3 7 63 1515 0
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -26
Q3501: D788E001BRFP266/D708E001BRFP266 (Audio DSP)
TERMINAL DESCRIPTION(3/3)
SIGNAL NAME
EM_D[0]
EM_D[1]
EM_D[2]
EM_D[3]
EM_D[4]
EM_D[5]
EM_D[6]
EM_D[7]
EM_D[8]
EM_D[9]
EM_D[10]
EM_D[11]
EM_D[12]
EM_D[13]
EM_D[14]
EM_D[15]
TE
L 13942296513
SIGNAL NAME
OSCIN
OSCOUT
OSCV
DD
OSCV
SS
CLKIN
PLLHV
RESET
TCK
TMS
TDI
TDO
TRST
EMU[0]
EMU[1]
Core Supply (CV )
DD
IO Supply (DV )
DD
www
Ground (V )
SS
.
http://www.xiaoyu163.com
PIN
(1)
TYPE PULL
NO.
External Memory Interface (EMIF) Data Bus
52 IO
51 IO
49 IO
48 IO
46 IO
45 IO
43 IO
41 IO
66 IO
64 IO
63 IO
61 IO
59 IO
58 IO
56 IO
55 IO
PIN
(1)
TYPE PULL
NO.
23 I
24 O
25 PWR
22 PWR
17 I
27 PWR
14 I
35 I
19 I
28 I
29 OZ
21 I
32 IO
34 IO
8, 16, 20, 33, 44, 53, 57, 65, 77, 85, 90, 101, 123, 128, 132
10, 31, 42, 50, 60, 68, 73, 81, 92, 103, 112, 125, 136
1, 6, 13, 15, 18, 26, 30, 36, 40, 47, 54, 62, 69, 72, 78, 82, 87, 95, 99, 106, 109, 114, 118, 124, 129, 133, 140
x ao u163
y
i
http://www.xiaoyu163.com
2 9
8
(2) (3)
GPIO
- N
- N
- N
- N
- N
- N
- N
- N
EMIF Data Bus [Lower 16 Bits]
- N
- N
- N
- N
- N
- N
- N
- N
Q Q
3 6 7 1 3 1 5
(2) (3)
GPIO
Clocks
- N 1.2-V Oscillator Input
- N 1.2-V Oscillator Output
- N Oscillator 1.2-V V
- N Oscillator V
- N Alternate clock input (3.3-V LVCMOS Input)
- N PLL 3.3-V Supply Input (requires external filter)
Device Reset
- N Device reset pin
Emulation/JTAG Port
IPU N Test Clock
IPU N Test Mode Select
IPU N Test Data In
IPU N Test Data Out
IPD N Test Reset
IPU N Emulation Pin 0
IPU N Emulation Pin 1
Power Pins
co
.
9 4 2 8
DESCRIPTION
0 5 8 2 9 9 4
DESCRIPTION
tap point (for filter only)
DD
tap point (for filter only)
SS
m
DTR-7.8
9 9
2 8 9 9