Integra DTR-7.8 Service Manual page 115

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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -13
Q3701,Q3721,Q3741,Q3761,Q3781: PCM1796DBR (24 bit, 192 kHz, 2ch DAC)
BLOCK DIAGRAM
LRCK
BCK
DATA
RST
MDO
MDI
MC
MS
MSEL
ZEROL
ZEROR
TE
L 13942296513
PIN CONFIGURATION
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Audio
Data Input
I/F
8
Oversampling
Digital
Filter
and
Function
Control
Function
Control
I/F
System
Zero
Clock
Detect
Manager
ZEROL
1
ZEROR
2
MSEL 3
LRCK
4
DATA
5
BCK 6
SCK
7
DGND
8
V
9
DD
MS
10
MDI
11
MC
12
MDO
13
RST
14
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2 9
8
Current
Segment
DAC
Advanced
Bias
Segment
and
DAC
Vref
Modulator
Current
Segment
DAC
Power Supply
Q Q
3 6 7 1 3 1 5
28 V 2L
CC
27 AGND3L
26 I L–
OUT
25 I L+
OUT
24 AGND2
23 V 1
CC
V L
22
COM
V R
21
COM
I
20
REF
AGND1
19
I R–
18
OUT
17 I R+
OUT
16 AGND3R
V 2R
15
CC
co
.
9 4 2 8
I OUT L–
I OUT L+
I/V and Filter
V COM L
I REF
V COM R
I OUT R–
I OUT R+
I/V and Filter
0 5 8 2 9 9 4 2 8
m
DTR-7.8
9 9
V OUT L
V OUT R
9 9