Integra DTR-7.8 Service Manual page 133

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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -31
Q3601 : D707E001BRFP250 (32 bit Floating-Point Digital Signal Processor)
TERMINAL DESCRIPTION(3/3)
SIGNAL NAME
OSCIN
OSCOUT
OSCVDD
OSCVSS
CLKIN
PLLHV
RESET
TCK
TMS
TDI
TDO
TRST
EMU[0]
EMU[1]
Core Supply (CVDD)
TE
L 13942296513
IO Supply (DVDD)
Ground (VSS)
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PIN NO. TYPE DESCRIPTION
23 I 1.2-V OscillatorInput
24 O 1.2-V OscillatorOutput
25 PWR Oscillator 1.2-V VDD tap point (for filter only)
22 PWR Oscillator VSS tap point (for filter only)
17 I Alternate clock input (3.3-V LVCMOS Input)
27 PWR PLL 3.3-V Supply Input (requires external filter)
14 I
35 I Test Clock
19 I Test Mode Select
28 I Test Data In
29 OZ Test Data Out
21 I Test Reset
32 IO Emulation Pin 0
34 IO Emulation Pin 1
8, 16, 20, 33, 44, 53, 57, 65, 77, 85, 90, 101, 123, 128, 132
10, 31, 42, 50, 60, 68, 73, 81, 92, 103, 112, 125, 136
1, 6, 13, 15, 18, 26, 30, 36, 40, 47, 54, 62, 69, 72, 78, 82, 87, 95, 99, 106, 109, 114, 118, 124, 129, 133, 140
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2 9
8
Clocks
Device Reset
Device reset pin
Emulation/JTAG Port
Power Pins
Q Q
3 6 7 1 3 1 5
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9 4 2 8
0 5 8 2 9 9 4 2 8
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DTR-7.8
9 9
9 9