Integra DTR-7.8 Service Manual page 176

QQ
3 7 63 1515 0
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -74
Q103 : F2628E-01 (XM Digital Transceiver)
TERMINAL DESCRIPTION(1/2)
Pin No. Pin Name
1 LSDP
3 SC_TX_OUT
5 SC_RX_IN
6 RFU (I2C-SCL)
7 RFU (I2C-SDA)
9 ANT_REV
11 RESET#
12 SLAVE_SEL
13 I2S_RATE
TE
L 13942296513
14 LINKACTIVE
15 COMM_TX_EN
18 COMM_RX_P
19 COMM_RX_M
22 COMM_TX_M
23 COMM_TX_P
26 OSC_OUT
28 OSC_IN
SC_RATE
(Rev 4A only, pull
29
down for rev 3B)
www
30 TEST
.
http://www.xiaoyu163.com
Direction Function in Slave Mode
S=In
Low Speed Data Port Input
M=Out
S=Out System Controller Bus (CBM)
M=Out Transmit Data Out
S=In System Controller Bus (CBM)
M=In Receive Data In
Reserved for Future Use (pull
S=In
down with a 100k resistor to
M=In
Ground)
Reserved for Future Use (pull
S=In
down with a 100k resistor to
M=In
Ground)
S=n/u Not used in Slave mode, leave
M=Out unconnected
S=In Asynchronous Reset In,
M=In (Active Low)
S=In Master/Slave Mode Select In
M=In (High = Slave Mode)
S=Out Output driven high, leave
M=Out unconnected
Link Active indicator (High =
S=Out
DT bus link is active and data
M=Out
is flowing)
DT Comm Bus External
S=Out
Transceiver Direction
M=Out
Control Output (0=Tx, 1=Rx)
S=In DT Differential Comm Bus
M=In Internal Receiver Positive In
S=In DT Differential Comm Bus
M=In Internal Receiver Negative In
DT Differential Comm Bus
S=Out
Internal Transmitter Negative
M=Out
Out
DT Differential Comm Bus
S=Out
Internal Transmitter Positive
M=Out
Out
S=Out
Crystal Driver Output
M=Out
S=In
Crystal/ Ext. Clock Input
M=In
SC interface baud rate Output
S=Out (High = DT4_MODE is high
M=In and the Master DTIC is
operating at 115.2K baud)
S=In Factory Test Mode Select
M=In (1=Test, 0= Normal Oper.)
x ao u163
y
i
http://www.xiaoyu163.com
2 9
8
Function in Master Mode
Low Speed Data Port Output
System Controller Bus (CBM)
Transmit Data Out
System Controller Bus (CBM)
Receive Data In
Reserved for Future Use (pull
down with a 100k resistor to
Ground)
Reserved for Future Use (pull
down with a 100k resistor to
Ground)
Indication of incompatible
antenna ( refer to section
4.3.2 for usage)
Asynchronous Reset In,
(Active Low)
Master/Slave Mode Select In
(Low = Master Mode)
Indicator of incoming I2S data
rate (see section 4.4.2)
Q Q
3 6 7 1 3 1 5
Link Active indicator (High =
DT bus link is active and data
is flowing)
DT Comm Bus External
Transceiver Direction
Control Output (0=Tx, 1=Rx)
DT Differential Comm Bus
Internal Receiver Positive In
DT Differential Comm Bus
Internal Receiver Negative In
DT Differential Comm Bus
Internal Transmitter Negative
Out
DT Differential Comm Bus
Internal Transmitter Positive
Out
Crystal Driver Output
Crystal/ Ext. Clock Input
SC interface baud rate select
Input
(High = 115.2K baud, Low =
9600 baud)
Factory Test Mode Select
(1=Test, 0= Normal Oper.)
co
.
9 4 2 8
Notes
Out= 4mA, SLC
In=LVTTL S/T
4mA, SLC
LVTTL S/T
LVTTL S/T
LVTTL S/T
4mA, SLC
LVTTL S/T
LVTTL S/T
4mA, SLC
0 5 8 2 9 9 4 2 8
4mA, SLC
4mA, SLC
LVDS in+
LVDS in–
LVDS out–
LVDS out+
Out= 4mA, SLC
In=LVTTL S/T
m
LVTTL S/T
DTR-7.8
9 9
9 9