Slave Boot Procedures
CS485xxr Hardware User's Manual
Pseudocode and flowcharts will be used to describe each of these boot procedures in detail. The flow charts
use the following messages:
• Write_* – Write to
• Read_* – Read from
Please note that * above can be replaced by SPI
For each case, the general download algorithm is the same. The system designer should also refer to the
control port sections of this document in
and reading from the
After completing the full download to the
code to begin execution. Please note that it takes time to lock the PLL when initially booting the DSP.
Typically this time is less than 200 ms. If a message is sent to the DSP during this time, the SCP_BSY pin
will go low to indicate that the DSP is busy. Any messages sent when the SCP_BSY pin is LOW will be lost.
If the SCP_BSY pin stays LOW longer than 200 ms, the host must reboot the DSP.
2.3.1 Slave Boot
The Slave Boot procedure is a sequence in which the external host is the bus master and directly loads the
application code. The system host controller has two communication modes available, as specified
CS485xx
in
Table
2-1. from the serial control port (SPI or I
"Boot Messages" on page
configuration messages, software configuration messages, and the kick-start message, please refer to
AN298, "
Firmware User's Manual".
CS485xx
2.3.2 Performing a Slave Boot
Figure 2-2
shows the steps taken during a Slave Boot. The procedure is discussed in
2-3
CS485xx
CS485xx
Chapter 3, "Serial Control Port"
is valid.
CS485xx
CS485xx
2-6. For information on how to configure the
Copyright 2009 Cirrus Logic, Inc.
™
2
®
or I
C
depending on the mode of host communication.
, a KICK START message is sent to cause the application
2
C). The boot messages used can be found in
CS485xx
for the details of when writing to
Section 2.3.3
overlays, such as hardware
Section
2.3.2.1.
DS734UM7
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