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Pin Assignments
CS485xx Hardware User's Manual
9.6 Pin Assignments
Table 9-9
shows the names and functions for each pin of the CS48560.
LQFP-48
Pin #
Function 1
(Default)
1
TEST
Test
2
RESET
Active Low Chip Reset
3
DBDA
Debug Data
4
GNDD1
Core ground
5
DBCK
Debug Clock
6
DAI1_LRCLK
PCM Audio Input Sample
Rate (Left/Right) Clock
7
GNDIO1
I/O ground
8
DAI1_SCLK
PCM Audio Input Bit Clock
9
GNDD2
Core ground
10
GPIO16
General Purpose Input/Output 1. DAI1_DATA0
11
GPIO0
General Purpose Input/Output 1. DAI1_DATA1
12
VDDIO1
I/O power supply voltage
13
GPIO1
General Purpose Input/Output 1. DAI1_DATA2
14
GPIO2
General Purpose Input/Output 1. DAI1_DATA3
15
GPIO17
General Purpose Input/Output 1. DAI2_DATA0
16
VDDD1
Core power supply voltage
17
GPIO14
General Purpose Input/Output 1. DAI2_LRCLK
18
GPIO15
General Purpose Input/Output 1. DAI2_SCLK
19
GNDIO2
I/O ground
20
DAO1_DATA0
Digital Audio Output 0
21
DAO_LRCLK
PCM Audio Sample Rate
Clock
22
GNDD3
Core ground
23
DAO_SCLK
PCM Audio Output Bit Clock
24
VDDIO2
I/O power supply voltage
25
GPIO18
General Purpose Input/Output 1. DAO_MCLK
26
GPIO4
General Purpose Input/Output 1. DAO1_DATA2
27
GPIO3
General Purpose Input/Output 1. DAO1_DATA1
28
VDDD2
Core power supply voltage
29
GPIO5
General Purpose Input/Output 1. DAO1_DATA3
30
GNDIO3
I/O ground
31
GPIO6
General Purpose Input/Output 1. DAO2_DATA0
32
GPIO7
General Purpose Input/Output 1. DAO2_DATA1
33
GNDD4
Core ground
34
GPIO9
General Purpose Input/Output 1. SCP_MOSI
35
GPIO10
General Purpose Input/Output 1. SCP_MISO
9-17
Table 9-9. Pin Assignments of CS48560
Description of Default
Secondary Functions
Function
1. DAI1_DATA4
2. DSD5
1. DSD_CLK
2. DSD0
2. DSD1
2. DSD2
2. DSD3
2. DSD4
1. HS0
2. HS2
2. HS1
2. XMTA
2. HS3
2. HS4
2. SCP_SDA
Copyright 2009 Cirrus Logic, Inc.
Description of Secondary Functions
1. Digital Audio Input Data
2. DSD Audio Input Data
1. DSD Audio Input Clock
1. Digital Audio Input Data
2. DSD Audio Input Data
1. Digital Audio Input Data
2. DSD Audio Input Data
1. Digital Audio Input Data
2. DSD Audio Input Data
1. Digital Audio Input Data
2. DSD Audio Input Data
1. Digital Audio Input Data
2. DSD Audio Input Data
1. PCM Audio Input Sample Rate (Left/
Right) Clock
PCM Audio Input Bit Clock
1. Hardware Strap Mode Select.
1. Audio Master Clock
1. Digital Audio Output
2. Hardware Strap Mode Select
1. Digital Audio Output
2. Hardware Strap Mode Select
1. Digital Audio Output
2. S/PDIF Audio Output A
1. Digital Audio Output
2. Hardware Strap Mode Select
1. Digital Audio Output
2. Hardware Strap Mode Select
1. SPI Mode Master Data Output/Slave Data
Input
1. SPI Mode Master Data Input/Slave Data
Output
2
2. I
C Mode Master/Slave Data IO
Pullup
Reset
at
Pwr
Type
State
Reset
IN
3.3V (5V tol)
IN
3.3V (5V tol)
BiDi
IN
Y
3.3V (5V tol)
PWR
0V
BiDi
IN
Y
3.3V (5V tol)
IN
Y
3.3V (5V tol)
PWR
0V
IN
Y
3.3V (5V tol)
PWR
0V
BiDi
IN
Y
3.3V (5V tol)
BiDi
IN
Y
3.3V (5V tol)
PWR
3.3V
BiDi
IN
Y
3.3V (5V tol)
BiDi
IN
Y
3.3V (5V tol)
BiDi
IN
Y
3.3V (5V tol)
PWR
1.8V
BiDi/OD
IN
Y
3.3V (5V tol)
BiDi
IN
Y
3.3V (5V tol)
PWR
0V
BiDi
IN
3.3V (5V tol)
BiDi
IN
Y
3.3V (5V tol)
PWR
0V
BiDi
IN
Y
3.3V (5V tol)
PWR
3.3V
BiDi
IN
Y
3.3V (5V tol)
BiDi
IN
Y
3.3V (5V tol)
BiDi
IN
Y
3.3V (5V tol)
PWR
1.8V
BiDi
IN
Y
3.3V (5V tol)
PWR
0V
BiDi
IN
Y
3.3V (5V tol)
BiDi
IN
Y
3.3V (5V tol)
PWR
0V
BiDi
IN
Y
3.3V (5V tol)
BiDi/OD
IN
Y
3.3V (5V tol)
DS734UM7
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