System Architecture - Analog Devices ADSP-BF592 EZ-KIT Lite Manual

System Architecture

System Architecture
This section describes the processor's configuration on the EZ-KIT Lite
board (Figure
On-board
Debug Agent
Power
Regulation
Li Battery
Charge Circuit,
Fuel Gauge
Figure 2-1. EZ-KIT Lite Block Diagram
The EZ-KIT Lite is designed to demonstrate the ADSP-BF592 Blackfin
processor capabilities. The processor has an I/O voltage of 3.3V. The core
voltage of the processor is controlled by an Analog Devices ADP1715 low
dropout regulator (LDO) and an Analog Devices AD5258 digipot, which
is configurable over the 2-wire interface (TWI) signals. Refer to the
2-2
2-1).
25 MHz
Oscillator
CLKIN
64 lead LFCSP
UARTs SPI
RS-232
16 Mb
TX/RX
SPI Flash
RS-232
Female
ADSP-BF592 EZ-KIT Lite Evaluation System Manual
ADSP-BF592
DSP
400 MHz
SPORT SPORT
SSM2603
Codec
12 MHz
Oscillator
PPI
LEDs (3)
PBs (3)
TWI
Mic/ Head/
Line Line
In Out