NEC MultiSync FP1350 Service Manual page 158

Hide thumbs Also See for MultiSync FP1350:
Table of Contents

Advertisement

b. Phase distortion correction circuit
This model has 4 phase distortion correction items. (SIDE PIN BALANCE, TILT, CORNER TOP
BALANCE, CORNER BOTTOM BALANCE). The distortion correction signal is output from 1bit D/A
converter at pin 57, and is integrated by integration circuit which is composed of R525 and C519. This
integrated signal is added to filter terminal at pin 20 (PLL2 filter circuit) via C508 and R505.
The figure 2.8. shows the screen image and voltage waveform at C519, when the phase distortion
correction are operated by OSM.
1bit DAC
57
IMAGE
C524 WAVE
MIN.
(Fig. 2.6) Voltage at C524 and screen image
Approx.1Vdc
C508
R526
C519
Integration Circuit
(Fig. 2.7) phase distortion correction circuit
C524 WAVE
IN/OUT
ALIGN
CORNER
TOP
CORNER
BOTTOM
S-WAVE
SIDE WING
OSM MENU
20
R506
R509
C510
8-10
IMAGE
MAX.
Q504
R510
C511

Hide quick links:

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the MultiSync FP1350 and is the answer not in the manual?

Questions and answers

This manual is also suitable for:

Fp1350-1Fp1350-1b

Table of Contents