Distortion Correction Circuit - NEC MultiSync FP1350 Service Manual

IC501
From PLL1
Approx.1Vdc
Filter Circuit

2) Distortion correction circuit

a. Size distortion correction circuit
This model has 6 size distortion correction items. (SIDE PIN, ALIGN, CORNER TOP, CORNER BOTTOM,
S-WAVE, SIDE WING). MPU controls these distortion correction data of IC501. DSP in IC501 generates
these correction signals and outputs distortion correction signal which is combined each of the correction
signals. The distortion correction signal is output from 1bit D/A converter at pin 64, and is integrated by
integration circuit which is composed of R544 and C524. This integrated signal is inverted by IC510, and
IC510 output signal is input into the distortion correction output circuit.
The figure 2.6. shows the screen image and voltage waveform at C524, when the size distortion
correction are operated by OSM.
Approx.0.5Vp-p
E/W. output
(1bitDAC)
1/N Divider
Phase Comparator
20
R509
C510
(Fig. 2.4) PLL2 circuit
R544
64
IC510
C524
Integration circuit
(Fig. 2.5) size distortion correction signal output
VCO
17
19
Q504
R510
R508
C511
Approx.1Vdc
3.3V
R548
R549
IC510
R545
R546
Inverting circuit
8-9
H. drive
Duty cycle
pulse
control
0.92Vdc
R507
Approx.0.5Vp-p