Geometry Accelerator Components; Pcidma; I/O Fifo - Intergraph RealiZm Graphics Z10 Hardware User's Manual

Geometry Accelerator Components

The following describes the major components of the Geometry Accelerator board available
for use with Z13, Z25, and V25.

PCIDMA

PCIDMA
The Geometry Accelerator employs the PCIDMA ASIC as the Peripheral Component
Interconnect (PCI) bus interface device. This device has an independent DMA engine to
accelerate the transfer of OpenGL data between the host processor and the Geometry
Accelerator.
The DMA engine transfers data in bursts into the input/output (I/O) FIFO on the Geometry
Accelerator. DMA transfers free the host processor from moving massive amounts of
graphics data across the PCI bus.

I/O FIFO

The I/O FIFO is a temporary depository for up to 4 KB of data being moved into the
Geometry Accelerator. The I/O FIFO allows DMA transfers to proceed at the maximum
speed of the PCI bus or the I/O bus by avoiding stall conditions.
I/O FIFO
Sequenc
e
55
DSPs