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The Texture Processor receives instructions from the Graphics Engine via a high-speed bus
and buffers the instructions in a FIFO to enhance performance. The Texture Processor reads
the instructions from the FIFO, and then translates them into reads and writes of texture
memory. Its primary function is to retrieve a group of texels, interpolate among them, and
generate a final color value. This final color value represents the textured color of a pixel.
The Texture Processor places this value into its output FIFO. The Graphics Engine transfers
the pixel's location and color value from the FIFO to the resolvers for placement into the
frame buffer.
Z10 Texturing Accelerator
The Z10 Texturing Accelerator board communicates with texture memory via a 256-bit bus,
which provides simultaneous access to eight 32-bit texels. Thirty-two bits are essential for
storage of true-color texels, including Alpha, to match the frame buffer's true-color
The following figure shows the front of a Z10 Texturing Accelerator board.
Texture Processors
Texture
Texture
Processor
Memory
Texture
Memory
Rasterization
Accelerator
Connector
pixels.
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