Power and Ground Pins
For clean, on-chip power distribution, the Pentium M processor has a large number of V
(ground) inputs. All power pins must be connected to V
must be connected to system ground planes. Use of multiple power and ground planes is
recommended to reduce I*R drop. Please refer to the platform design guides for more details. The
FSB Clock (BCLK[1:0]) and Processor Clocking
BCLK[1:0] directly controls the system bus interface speed as well as the core frequency of the
processor. As in previous generation processors, the Pentium M processor core frequency is a
multiple of the BCLK[1:0] frequency. In regards to processor clocking, the Pentium M processor
uses a differential clocking implementation.
The Pentium M processor uses six voltage identification pins, VID[5:0], to support automatic
selection of power supply voltages. The VID pins for the Pentium M processor are CMOS outputs
driven by the processor VID circuitry.
state of VID[5:0]. A "1" in this refers to a high-voltage level and a "0" refers to low-voltage level.
pins must be supplied the voltage determined by the VID (Voltage ID) pins.
specifies the voltage level corresponding to the
power planes while all V