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Electrical Specifications
Figure 3-12. Deep Sleep V
Table 3-22. FSB Differential BCLK Specifications
Symbol
V
L
V
H
V
CROSS
Δ V
CROSS
V
TH
I
LI
Cpad
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. Crossing Voltage is defined as absolute voltage where rising edge of BCLK0 is equal to the falling edge of
BCLK1.
3. Threshold Region is defined as a region entered about the crossing voltage in which the differential receiver
switches. It includes input threshold hysteresis.
4. For Vin between 0 V and V
5. Cpad includes die capacitance only. No package parasitics are included.
6. VCROSS is defined as the total variation of all crossing voltages as defined in note 2
44
and I
Load Line
CC
CC
V
CC
Slope= -3.0 mV/A
Vcc nom {HFM | LFM}
- 1.2%
+/-1.5% from Nominal =VR Error
0
Parameter
Input Low Voltage
Input High Voltage
Crossing Voltage
Range of Crossing Points
Threshold Region
Input Leakage Current
Pad Capacitance
.
H
[V]
10mV= RIPPLE
Min
Typ
0
0.660
0.710
0.850
0.25
0.35
0.55
N/A
N/A
0.140
V
-0.100
V
CROSS
± 100
1.8
2.3
2.75
I
CC
[A]
I
max
CC
Deep Sleep
{HFM | LFM}
Max
Unit Notes
V
V
V
2
V
6
+0.100
V
3
CROSS
µA
4
pF
5
Datasheet
1
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