Exception Processing Vectors; Cc (Customized Condition Flag); Chip Mode; Mcu Mode And Mpu Mode - Epson S1C88650 Technical Manual

3.3 Exception Processing Vectors

000000H–00004BH in the program area of the
S1C88650 is assigned as exception processing
vectors. Furthermore, from 00004EH to 0000FFH,
software interrupt vectors are assignable to any two
bytes which begin with an even address.
Table 3.3.1 lists the vector addresses and the
exception processing factors to which they corre-
spond.
Table 3.3.1 Exception processing vector table
Vector
Exception processing factor
address
000000H Reset
000002H Zero division
000004H Watchdog timer (NMI)
000006H K07 input interrupt
000008H K06 input interrupt
00000AH K05 input interrupt
00000CH K04 input interrupt
00000EH K03 input interrupt
000010H K02 input interrupt
000012H K01 input interrupt
000014H K00 input interrupt
000016H PTM 0 underflow interrupt
000018H PTM 0 compare match interrupt
00001AH PTM 1 underflow interrupt
00001CH PTM 1 compare match interrupt
00001EH PTM 2 underflow interrupt
000020H PTM 2 compare match interrupt
000022H PTM 3 underflow interrupt
000024H PTM 3 compare match interrupt
000026H System reserved (cannot be used)
000028H Serial I/F error interrupt
00002AH Serial I/F receiving complete interrupt
00002CH Serial I/F transmitting complete interrupt
00002EH System reserved (cannot be used)
000030H System reserved (cannot be used)
000032H System reserved (cannot be used)
000034H Clock timer 32 Hz interrupt
000036H Clock timer 8 Hz interrupt
000038H Clock timer 2 Hz interrupt
00003AH Clock timer 1 Hz interrupt
00003CH PTM 4 underflow interrupt
00003EH PTM 4 compare match interrupt
000040H PTM 5 underflow interrupt
000042H PTM 5 compare match interrupt
000044H PTM 6 underflow interrupt
000046H PTM 6 compare match interrupt
000048H PTM 7 underflow interrupt
00004AH PTM 7 compare match interrupt
00004CH System reserved (cannot be used)
00004EH
: Software interrupt
0000FEH
For each vector address and the address after it, the
start address of the exception processing routine is
written into the subordinate and super ordinate
sequence. When an exception processing factor is
generated, the exception processing routine is
executed starting from the recorded address.
S1C88650 TECHNICAL MANUAL
When multiple exception processing factors are
generated at the same time, execution starts with
the highest priority item.
The priority sequence shown in Table 3.3.1 assumes
that the interrupt priority levels are all the same.
The interrupt priority levels can be set by software
in each system. (See Section 5.14, "Interrupt and
Standby Status".)
Note: For exception processing other than reset,
SC (system condition flag) and PC (program
counter) are evacuated to the stack and
branches to the exception processing
Priority
routines. Consequently, when returning to
High
the main routine from exception processing
routines, please use the RETE instruction.
See the "S1C88 Core CPU Manual" for information
on CPU operations when an exception processing
factor is generated.
3.4 CC
The S1C88650 does not use the customized condi-
tion flag (CC) in the core CPU. Accordingly, it
cannot be used as a branching condition for the
conditional branching instruction (JRS, CARS).

3.5 Chip Mode

3.5.1 MCU mode and MPU mode

The chip operating mode can be set to one of two
settings using the MCU/MPU terminal.
MCU mode...
Switch to this setting when using internal ROM.
With respect to areas other than internal
memory, external memory can even be
expanded. See Section 3.5.2, "Bus mode", for the
memory map.
In the MCU mode, during initial reset, only
systems in internal memory are activated.
Internal program ROM is normally fixed as the
top portion of the program memory from the
common area (logical space 0000H–7FFFH).
Exception processing vectors are assigned in
internal program ROM. Furthermore, the
Low
application initialization routines that start with
No
reset exception processing must likewise be
priority
written to internal program ROM. Since bus and
rating
other settings which correlate with external
expanded memory can be executed in software,
this processing is executed in the initialization
routine written to internal program ROM. Once
these bus mode settings are made, external
memory can be accessed.
EPSON
3 CPU AND BUS CONFIGURATION
(Customized Condition Flag)
_______
_______
Set the MCU/MPU terminal to HIGH
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