Control Of Watchdog Timer; Programming Notes - Epson S1C88650 Technical Manual

5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Watchdog Timer)

5.3.3 Control of watchdog timer

Table 5.3.3.1 shows the control bits for the watchdog timer.
Address Bit Name
00FF40 D7 WDEN
Watchdog timer enable
D6 FOUT2 FOUT frequency selection
D5 FOUT1
D4 FOUT0
D3 FOUTON
FOUT output control
D2 WDRST Watchdog timer reset
D1 TMRST
Clock timer reset
D0 TMRUN Clock timer Run/Stop control
WDEN: 00FF40H•D7
Selects whether the watchdog timer is used
(enabled) or not (disabled).
When "1" is written: Enabled
When "0" is written: Disabled
Reading:
When "1" is written to the WDEN register, the
watchdog timer starts count operation. When "0" is
written, the watchdog timer does not count and
does not generate the interrupt (NMI).
At initial reset, this register is set to "1".
WDRST: 00FF40H•D2
Resets the watchdog timer.
When "1" is written: Watchdog timer is reset
When "0" is written: No operation
Reading:
By writing "1" to WDRST, the watchdog timer is
reset, after which it is immediately restarted.
Writing "0" will mean no operation.
Since WDRST is for writing only, it is constantly set
to "0" during readout.
40
Table 5.3.3.1 Watchdog timer control bits
Function
FOUT2 FOUT1 FOUT0
1 1 1
1 1 0
1 0 1
1 0 0
0 1 1
0 1 0
0 0 1
0 0 0
Valid
______
Constantly "0"
1
Enable
Frequency
f / 1
OSC1
f / 2
OSC1
f / 4
OSC1
f / 8
OSC1
f / 1
OSC3
f / 2
OSC3
f / 4
OSC3
f / 8
OSC3
On
Reset
Reset
Run

5.3.4 Programming notes

(1) When the watchdog timer is being used, the
software must reset it within the cycles selected
by mask option.
(2) Do not execute the SLP instruction for 2 msec
______
after a NMI interrupt has occurred (when f
is 32.768 kHz).
(3) Because the watchdog timer is set in operation
state by initial reset, set the watchdog timer to
disabled state (not used) before generating an
______
interrupt (NMI) if it is not used.
______
(4) The NMI generation cycles in the watchdog
timer mask option list represent maximum
values. A maximum minus (<selected optional
cycle> / 4) seconds of error occurs depending
on the watchdog timer reset timing. For
example, when 131072/f
mask option, the actual NMI generation cycle is
within the range of 98304/f
seconds.
EPSON
0 SR R/W
1 R/W
Disable
0 R/W
0 R/W
0 R/W
0 R/W
Off
– W
No operation Constantly "0" when
– W
No operation being read
0 R/W
Stop
is selected by
OSC1
______
to 131072/f
OSC1
S1C88650 TECHNICAL MANUAL
Comment
OSC1
OSC1