Programming Notes - Epson S1C88650 Technical Manual

Address Bit Name
00FF29 D7 FTC3
PTM3 compare match interrupt factor flag
D6 FTU3 PTM3 underflow interrupt factor flag
D5 FTC2
PTM2 compare match interrupt factor flag
D4 FTU2 PTM2 underflow interrupt factor flag
D3 FTC1
PTM1 compare match interrupt factor flag
D2 FTU1 PTM1 underflow interrupt factor flag
D1 FTC0
PTM0 compare match interrupt factor flag
D0 FTU0 PTM0 underflow interrupt factor flag
00FF2E D7 FTC7
PTM7 compare match interrupt factor flag
D6 FTU7 PTM7 underflow interrupt factor flag
D5 FTC6
PTM6 compare match interrupt factor flag
D4 FTU6 PTM6 underflow interrupt factor flag
D3 FTC5
PTM5 compare match interrupt factor flag
D2 FTU5 PTM5 underflow interrupt factor flag
D1 FTC4
PTM4 compare match interrupt factor flag
D0 FTU4 PTM4 underflow interrupt factor flag
Refer to the explanations on the respective peripheral circuits for the setting content and control method for each bit.

5.14.7 Programming notes

(1) When executing the RETE instruction without
resetting the interrupt factor flag after an
interrupt has been generated, the same interrupt
will be generated. Consequently, the interrupt
factor flag corresponding to that routine must
be reset (writing "1") in the interrupt processing
routine.
(2) Beware. If the interrupt flags (I0 and I1) have
been rewritten (set to lower priority) prior to
resetting an interrupt factor flag after an
interrupt has been generated, the same interrupt
will be generated again.
S1C88650 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Interrupt and Standby Status)
Table 5.14.6.1(c) Interrupt control bits
Function
EPSON
1 0
(R) (R)
Interrupt No interrupt
factor is factor is
generated generated
(W) (W)
Reset No operation
(R) (R)
Interrupt No interrupt
factor is factor is
generated generated
(W) (W)
Reset No operation
(3) An exception processing vector is fixed at 2
bytes, so it cannot specify a branch destination
bank address. Consequently, to branch from
multiple banks to a common exception process-
ing routine, the front portion of an exception
processing routine must be described within the
common area (000000H–007FFFH).
(4) Do not execute the SLP instruction for 2 msec
after a NMI interrupt has occurred (when f
is 32.768 kHz).
SR R/W Comment
0 R/W
0 R/W
OSC1
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