Table of Contents
Advertisement
Table 25.
Signal Description (Sheet 9 of 10)
Name
THERMTRIP#
TMS
TRDY#
TRST#
VCC
VCCA
VCCIOPLL
VCCPLL
VCC_SENSE
VCC_MB_
REGULATION
72
Type
In the event of a catastrophic cooling failure, the processor will
automatically shut down when the silicon has reached a
temperature approximately 20 °C above the maximum T
Assertion of THERMTRIP# (Thermal Trip) indicates the processor
junction temperature has reached a level beyond where permanent
silicon damage may occur. Upon assertion of THERMTRIP#, the
processor will shut off its internal clocks (thus, halting program
execution) in an attempt to reduce the processor junction
temperature. To protect the processor, its core voltage (V
be removed following the assertion of THERMTRIP#. Driving of the
Output
THERMTRIP# signal is enabled within 10 s of the assertion of
PWRGOOD (provided V
de-assertion of PWRGOOD (if V
may also be disabled). Once activated, THERMTRIP# remains
latched until PWRGOOD, V
assertion of the PWRGOOD, V
THERMTRIP#, if the processor's junction temperature remains at or
above the trip level, THERMTRIP# will again be asserted within
10 s of the assertion of PWRGOOD (provided V
valid).
TMS (Test Mode Select) is a JTAG specification support signal used
Input
by debug tools.
TRDY# (Target Ready) is asserted by the target to indicate that it is
Input
ready to receive a write or implicit writeback data transfer. TRDY#
must connect the appropriate pins/lands of all FSB agents.
TRST# (Test Reset) resets the Test Access Port (TAP) logic. TRST#
Input
must be driven low during power on Reset.
VCC are the power pins for the processor. The voltage supplied to
Input
these pins is determined by the VID[7:0] pins.
VCCA provides isolated power for internal PLLs on previous
Input
generation processors. It may be left as a no connect on boards
supporting the processor.
VCCIOPLL provides isolated power for internal processor FSB PLLs
Input
on previous generation processors. It may be left as a no connect
on boards supporting the processor.
Input
VCCPLL provides isolated power for internal processor FSB PLLs.
VCC_SENSE is an isolated low impedance connection to processor
Output
core power (V
). It can be used to sense or measure voltage near
CC
the silicon with little noise.
This land is provided as a voltage regulator feedback sense point
for V
. It is connected internally in the processor package to the
CC
Output
sense point land U27 as described in the Voltage Regulator Design
Guide.
Land Listing and Signal Descriptions
Description
and V
are asserted) and is disabled on
TT
CC
or V
are not valid, THERMTRIP#
TT
CC
or V
is de-asserted. While the de-
TT
CC
or V
signal will de-assert
TT
CC
TT
.
C
) must
CC
and V
are
CC
Datasheet
Advertisement
Table of Contents
