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Electrical Specifications
1.
Each processor is programmed with a maximum valid voltage identification value (VID),
which is set at manufacturing and can not be altered. Individual maximum VID values are
calibrated during manufacturing such that two processors at the same frequency may have
different settings within the VID range. Note that this differs from the VID employed by the
processor during a power management event (Thermal Monitor 2, Enhanced Intel
SpeedStep technology, or Extended HALT State).
2.
Unless otherwise noted, all specifications in this table are based on estimates and
simulations or empirical data. These specifications will be updated with characterized data
from silicon measurements at a later date.
3.
These voltages are targets only. A variable voltage source should exist on systems in the
event that a different voltage is required. See
information.
4.
The voltage specification requirements are measured across VCC_SENSE and VSS_SENSE
lands at the socket with a 100 MHz bandwidth oscilloscope, 1.5 pF maximum probe
capacitance, and 1 M
probe should be less than 5 mm. Ensure external noise from the system is not coupled into
the oscilloscope probe.
5.
See
current. The processor should not be subjected to any V
V
CC
6.
I
CC_MAX
7.
V
TT
specification is measured at the land.
8.
Baseboard bandwidth is limited to 20 MHz.
9.
This is the maximum total current drawn from the V
specification does not include the current coming from on-board termination (R
through the signal line. See the Voltage Regulator Design Guide to determine the total I
drawn by the system. This parameter is based on design characterization and is not tested.
10.
Adherence to the voltage specifications for the processor are required to ensure reliable
processor operation.
Table 5.
Processor V
I
(A)
CC
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
NOTES:
1.
The loadline specification includes both static and transient limits except for overshoot allowed as shown in
Section
2.
This table is intended to aid in reading discrete points on
Datasheet
minimum impedance. The maximum length of ground wire on the
Table 5
and
Figure
1, for the minimum, typical, and maximum V
exceeds V
for a given current.
CC_MAX
specification is based on V
must be provided using a separate voltage source and not be connected to V
Static and Transient Tolerance
CC
Voltage Deviation from VID Setting (V)
Maximum Voltage
1.65 m
0.000
-0.008
-0.017
-0.025
-0.033
-0.041
-0.050
-0.058
-0.066
-0.074
-0.083
-0.091
-0.099
-0.107
-0.116
-0.124
2.6.3.
Section 2.3
and
and I
CC
loadline. See
Figure 1
CC_
MAX
plane by only the processor. This
TT
Typical Voltage
1.73 m
-0.019
-0.028
-0.036
-0.045
-0.054
-0.062
-0.071
-0.079
-0.088
-0.097
-0.105
-0.114
-0.123
-0.131
-0.140
-0.148
Figure
1.
Table 2
for more
allowed for a given
CC
combination wherein
CC
for details.
. This
CC
),
TT
TT
1, 2, 3, 4
Minimum Voltage
1.80 m
-0.038
-0.047
-0.056
-0.065
-0.074
-0.083
-0.092
-0.101
-0.110
-0.119
-0.128
-0.137
-0.146
-0.155
-0.164
-0.173
19
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