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Thermal Specifications and Design Considerations
5.2.4
PROCHOT# Signal
An external signal, PROCHOT# (Processor Hot), is asserted when the processor core
temperature has reached its maximum operating temperature. If the Thermal Monitor
is enabled (note that the Thermal Monitor must be enabled for the processor to be
operating within specification), the TCC will be active when PROCHOT# is asserted. The
processor can be configured to generate an interrupt upon the assertion or de-
assertion of PROCHOT#.
PROCHOT# is a bi-directional signal. As an output, PROCHOT# (Processor Hot) will go
active when the processor temperature monitoring sensor detects that one or both
cores has reached its maximum safe operating temperature. This indicates that the
processor Thermal Control Circuit (TCC) has been activated, if enabled. As an input,
assertion of PROCHOT# by the system will activate the TCC, if enabled, for both cores.
The TCC will remain active until the system de-asserts PROCHOT#.
Note:
PROCHOT# will not be asserted (as an output) or observed (as an input) when the
processor is in the Stop Grant, Sleep, Deep Sleep, and Deeper Sleep low-power states;
hence, the thermal solution must be designed to ensure the processor remains within
specification. If the processor enters one of the above low-power states with
PROCHOT# already asserted, PROCHOT# will remain asserted until the processor exits
the low-power state and the processor DTS temperature drops below the thermal trip
point.
PROCHOT# allows for some protection of various components from over-temperature
situations. The PROCHOT# signal is bi-directional in that it can either signal when the
processor (either core) has reached its maximum operating temperature or be driven
from an external source to activate the TCC. The ability to activate the TCC using
PROCHOT# can provide a means for thermal protection of system components.
Bi-directional PROCHOT# can allow VR thermal designs to target maximum sustained
current instead of maximum current. Systems should still provide proper cooling for the
VR, and rely on bi-directional PROCHOT# only as a backup in case of system cooling
failure. The system thermal design should allow the power delivery circuitry to operate
within its temperature specification even while the processor is operating at its Thermal
Design Power. With a properly designed and characterized thermal solution, it is
anticipated that bi-directional PROCHOT# would only be asserted for very short periods
of time when running the most power intensive applications. An under-designed
thermal solution that is not able to prevent excessive assertion of PROCHOT# in the
anticipated ambient environment may cause a noticeable performance loss. See the
Voltage Regulator Design Guide for details on implementing the bi-directional
PROCHOT# feature.
5.2.5
THERMTRIP# Signal
Regardless of whether or not Thermal Monitor or Thermal Monitor 2 is enabled, in the
event of a catastrophic cooling failure, the processor will automatically shut down when
the silicon has reached an elevated temperature (see the THERMTRIP# definition in
Table
25). At this point, the FSB signal THERMTRIP# will go active and stay active as
described in
does not generate any bus cycles. If THERMTRIP# is asserted, processor core voltage
(V
) must be removed within the timeframe defined in
CC
Datasheet
Table
25. THERMTRIP# activation is independent of processor activity and
Table
10.
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