Intel E6300 - Core 2 Duo Dual-Core Processor Datasheet page 58

Table 24.
Land # Land Name
M29
M30
N1 PWRGOOD
N2
N3
N4 RESERVED
N5 RESERVED
N6
N7
N8
N23
N24
N25
N26
N27
N28
N29
N30
P1
P2
P3
P4
P5 RESERVED
P6
P7
P8
P23
P24
P25
P26
P27
P28
P29
P30
R1
R2
R3 FERR#/PBE#
R4
R5
58
Numerical Land
Assignment
Signal Buffer
Type
VCC Power/Other
VCC Power/Other
Power/Other
IGNNE# Asynch CMOS
VSS Power/Other
VSS Power/Other
VSS Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
DPSLP# Asynch CMOS
SMI# Asynch CMOS
INIT# Asynch CMOS
VSS Power/Other
A04# Source Synch Input/Output
VSS Power/Other
VCC Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
COMP3 Power/Other
VSS Power/Other
Asynch CMOS
A08# Source Synch Input/Output
VSS Power/Other
Table 24.
Direction Land # Land Name
R6 ADSTB0#
R7
Input R8
Input R23
R24
R25
R26
R27
R28
R29
R30
T1 COMP1
T2 DPRSTP#
T3
T4
T5
T6
T7
Input T8
Input T23
Input T24
T25
T26
T27
T28
T29
T30
U1
U2
U3
U4
U5
U6
U7
Input U8
U23
Output U24
U25
U26
Land Listing and Signal Descriptions
Numerical Land
Assignment
Signal Buffer
Direction
Type
Source Synch Input/Output
VSS Power/Other
VCC Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
VSS Power/Other
Power/Other
Asynch CMOS
VSS Power/Other
A11# Source Synch Input/Output
A09# Source Synch Input/Output
VSS Power/Other
VSS Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
FC28 Power/Other
FC29 Power/Other
FC30 Power/Other
A13# Source Synch Input/Output
A12# Source Synch Input/Output
A10# Source Synch Input/Output
VSS Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
VCC Power/Other
Input
Input
Datasheet