Processing Related To Index Registers - Omron CJ - PROGRAMMING MANUAL 12-2009 Programming Manual

Index Registers
Instruction group
Increment/Decrement
Instructions
Symbol Math Instructions DOUBLE SIGNED BINARY ADD WITH-
Special Instructions
6-2-3

Processing Related to Index Registers

Processing
Stack processing
Table Tables with one-
process- word records
ing
(Range instruc-
tions)
Tables with multiple-word
records
(Record-table instructions)
Stack Processing
286
Instruction name
DOUBLE INCREMENT BINARY
DOUBLE DECREMENT BINARY
OUT CARRY
DOUBLE SIGNED BINARY SUBTRACT
WITHOUT CARRY
CONVERT ADDRESS FROM CV
CONVERT ADDRESS TO CV
Note Instructions for double-length operands (i.e., those with "L" at the end) are
used for index registers IR0 to IR15 because each register contains two
words.
The CS/CJ-series CPU Unit's Table Data Processing instructions complement
the functions of the Index Registers. These instructions can be broadly
divided into the stack-processing and table-processing instructions
Operate FIFO (first-in first-out) or
LIFO (last-in first-out) data tables,
and read, write, insert, delete, or
count data entries in data tables.
Basic pro- Find values such as the checksum, a
cessing particular value, the maximum value,
or minimum value in the range.
Special Perform various other table process-
processing ing such as comparisons or sorting.
Process data in records that are sev-
eral words long.
Stack instructions act on specially defined data tables called stacks. Data can
be drawn from a stack on a first-in first-out (FIFO) or last-in first-out (LIFO)
basis.
A particular region of I/O memory must be defined as a stack. The first words
of the stack indicate the length of the stack and contain the stack pointer. The
stack pointer is incremented each time that data is written to the stack to indi-
cate the next address where data should be stored.
Mnemonic
++L(591)
– –L(593)
+L(401)
–L(411)
FRMCV(284)
TOCV(285)
Purpose
SSET(630), PUSH(632), FIFO(633),
LIFO(634), SREAD(639),
SWRITE(640), SINS(641), SDEL(642),
SNUM(638)
FCS(180), SRCH(181), MAX(182),
MIN(183), and SUM(184)
Combine Index Registers with instruc-
tions such as SRCH(181), MAX(182),
MIN(183), and comparison instruc-
tions.
Combine Index Registers with instruc-
tions such as DIM(631), SETR(635),
GETR(636), and comparison instruc-
tions.
Section 6-2
Primary function
Changes the PLC memory
address in the Index Register by
incrementing, decrementing, or
offsetting its content.
Convert actual PLC memory
addresses between CV-series and
CS/CJ-series addresses.
@@
(The CS1G/H-CPU (-V1) and
@ @@
CJ1 -CPU CPU Units do not
this function.)
Instructions