Omron CJ - PROGRAMMING MANUAL 12-2009 Programming Manual page 312

Cycle Time/High-speed Processing
Maximum Data Link I/O Response Time
Input
Input ON delay
×
Data transfer to
Controller Link Unit
Processing in
CPU Unit #2
1,2,3...
272
Normal Processing (Not Using DLNK(226))
Input Unit
(1) Delay of two cycle times
One cycle time
Program
execution
×
One com-
munica-
tions cycle
×
Maximum data link I/O response time
There are three points shown in the diagram above where processing is
delayed, increasing the data link I/O response time.
1. The input arrives in the PLC (CPU Unit #1) just after I/O refreshing, caus-
ing a delay of one cycle before the input is read into the PLC. CPU Bus
Units are refreshed after program execution, causing a total delay of two
cycle times.
2. Data exchange occurs just after the PLC passes the token that makes it
the polling node, causing a delay of up to one communications cycle time
before the data is transferred in data link processing. There will also be a
delay of up to one communications cycle time after receiving the token,
causing a total delay of up to two communications cycle times.
3. The data transferred in data link processing arrives at the PLC (CPU Unit
#2) after data exchange, so the data will not be read into the PLC until the
next data exchange, causing a delay of up to one cycle. CPU Bus Units are
refreshed after program execution, causing a total delay of two cycle times.
The equation for maximum data link I/O response time is as follows:
Input ON delay
Cycle time of PLC at CPU Unit #1 × 2
Communications cycle time × 2
Cycle time of PLC at CPU Unit #2 × 2
Output ON delay
Total (data link I/O response time)
Basic I/O Units
refreshed.
CPU Bus Units refreshed
(including data links)
Processing in
CPU Unit #1
(2) Delay of two communications cycle times
Data link transmissions
(3) Delay of two cycle times
Data received from Controller Link Unit
One cycle time
Program
execution
Output Unit
Output ON delay
1.5 ms
25 ms × 2
10 ms × 2
20 ms × 2
15 ms
126.5 ms
Section 6-1