Quectel EM160R-GL Hardware Design page 47

The following figure shows a reference circuit of these four pins.
Host
Note: The voltage level VCC_IO_HOST depends on the host side, and could be a 1.8 V or 3.3 V
voltage level.
Figure 21: Recommended Circuit of EM160R-GL Configuration Pins
Table 26: Configuration Pins List of M.2 Specification
CONFIG_0 CONFIG_1
(Pin 21) (Pin 69)
GND GND
EM160R-GL_Hardware_Design
VCC_IO_HOST
R1 R2 R3
100K 100K 100K
GPIO
GPIO
GPIO
GPIO
CONFIG_2 CONFIG_3
(Pin 75) (Pin 1)
NC NC
R4
100K
CONFIG_0
CONFIG_1
CONFIG_2
CONFIG_3
Module Type and
Main Host Interface
WWAN-PCIe,
USB 3.1
LTE-A Module Series
EM160R-GL
0 Ω
21
0 Ω
69
NM-0 Ω
75
NM-0 Ω
1
Port Configuration
2 (Quectel defined)
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