Quectel EM160R-GL Hardware Design page 12

LTE-A Module Series
Figure Index
Figure 1: Functional Diagram ..................................................................................................................... 17
Figure 2: Pin Assignment ........................................................................................................................... 19
Figure 3: Power Supply Limits During Burst Transmission ........................................................................ 24
Figure 4: Reference Design of VCC .......................................................................................................... 25
Figure 5: Reference Design of Power Supply ............................................................................................ 25
Figure 6: Turn on the Module with a Host GPIO ........................................................................................ 26
Figure 7: Turn-on Timing ............................................................................................................................ 27
Figure 8: Reference Circuit for Laptop PCIe Reset Logic ......................................................................... 28
Figure 9: Turn-off Timing through FULL_CARD_POWER_OFF# ............................................................. 28
Figure 10: Reference Design of RESET# with NMOS Driver Circuit ........................................................ 29
Figure 11: Timing of Resetting the Module ................................................................................................ 30
Figure 12: Reference Circuit of Normally Closed (U)SIM Card Connector ............................................... 33
Figure 13: Reference Circuit of Normally Open (U)SIM Card Connector ................................................. 34
Figure 14: Reference Circuit of a 6-Pin (U)SIM Card Connector .............................................................. 34
Figure 15: PCIe Interface Reference Circuit (EP Mode)............................................................................ 37
Figure 16: PCIe D3 State Timing .......................................................................................................... 38
Cold
Figure 17: Reference Design of W_DISABLE1# and W_DISABLE2# ...................................................... 40
Figure 18: Reference Design of WWAN_LED# ......................................................................................... 41
Figure 19: Reference Design of WAKE_ON_WAN# .................................................................................. 42
Figure 20: Reference Design of DPR ........................................................................................................ 43
Figure 21: Recommended Circuit of EM160R-GL Configuration Pins ...................................................... 46
Figure 22: Antenna Connectors on the EM160R-GL Module .................................................................... 54
Figure 23: Dimensions of the Receptacle (Unit: mm) ................................................................................ 55
Figure 24: Dimensions of Mated Plugs (Ø 0.81 mm Coaxial Cables) (Unit: mm) ..................................... 56
Figure 25: Space Factor of Mated Connectors (Ø 0.81 mm Coaxial Cables) (Unit: mm) ......................... 56
Figure 26: Space Factor of Mated Connectors (Ø 1.13 mm Coaxial Cables) (Unit: mm) ......................... 57
Figure 27: Distribution of Heat Source Chips Inside the Module ............................................................... 65
Figure 28: Placement and Fixing of the Heatsink ...................................................................................... 66
Figure 29: Mechanical Dimensions ............................................................................................................ 67
Figure 30: Top and Bottom Views of the Module ....................................................................................... 68
Figure 31: Installation Schematic ............................................................................................................... 69
Figure 32: Blister Tray Dimension Drawing ............................................................................................... 70
Figure 33: Packaging Process ................................................................................................................... 71
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