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PA-W1400
PA-W1410/1400
CPU (M50734) Pin Configuration
Pin | CPUsignal | Cir
gram
;
:
CPU signal | Circuit diagram
j
'
ad
nae
signal name | YO
Signal function
Neel
Sian
signal name. | "0
Signal function
Software power key sense | | 33
P40
3
|_| Default print pitch (10/12)
1
Po4
PKY
1
signal
i
Pat
"4
1 | Digital tab division symbol
2
DWE
DME
°
Data memory access
(Jy)
_
signal
45
pas
-
, | Defautt print pressure
3
Pos
'SCAN8
© | Data scan signal (line 8)
(High/Low)
4
PO7
SCAN9
© | Data scan signal (line 9)
36
p43
DISKCHANGE | 1
Disk change generation
5
PIO
SCANO
Q | Data scan signal (line 0)
signal
6
Pit
'SCANT
(© | Data scan signal (line 1)
37
VREF
GND
— | Power source (GND)
7
Pi2
'SCAN2
© | Data scan signal (line 2)
38
RD
RD
© | Data read timing signal
8
P13
'SCANS
© | Data scan signal (line 3)
39
WR
WR
© | Data write timing signal
9
P14
'SCAN4
(© | Data scan signal (line 4)
[40
®
®
© | System clock signal
10
PIS
'SCANS:
© | Data scan signal (line 5)
41 | syNc
SYNC
° conn
ee read
11
PI6
SCANG
© | Data scan signal (line 6)
jiming signe".
[2
iy
SCANT
© | Data scan signal (ine 7)
| 42
AIS
AIS
(© [Address bus signal (bit 15) |
Carriage motor excitement
43
A14
A14
© | Address bus signal (bit 14) |
13
P20
cM4
© | phase signal (- B phase)
44
A13
AIS
© | Address bus signal (bit 13) |
44
ral
Gas
© | Carriage motor excitement
45
A12
AI2
© | Address bus signal (bit 12)
phase signal (— A phase)
46
Alt
Alt
(© | Address bus signal (bit 11)
45
p22
M2
°
Carriage motor excitement
47
A10
A10
| Address bus signal (bit 10)
phase signal (B phase)
48
'AQ
AQ
© | Address bus signal (bit 9)
Carriage motor excitement | | 49
AB
AB
(© | Address bus signal (bit 8)
16
P23
CMt
°
9)
a Sone (A — -
50 | ALE
ALE
0 | Address latch timing signal
el motor excitement
A
Ate)
Lares
WM4 _| © | phase signal (-B phase)
st | A7/07
aro?
| vo | aeeressidata bus elgrell
Wheel motor excitement
7
18
_
wus
© | chase signal (-A phase)
52 | A6/D6
Aedes =| v0 mae bus signal
Wheel motor excitement
;
ig
F26.
wn.
© | chase signal (B phase)
53 | As/DS
A5/D5
| VO oreo bus signal
Wheel motor excitement
:
=
re
Mi
© | phase signal (A phase)
54. | Aaa
aaa =| v0 foveal bus signal
24
P30
SENSEO | |_| Key sense signal (bit 0)
:
'Address/data bus signal
22
P3t
SENSE1
1 [Key sense signal (bit 1)
55 | Aa/03
A3/D3
VO | pit 3)
2
[23
P32
SENSE2 | 1_|Key sense signal (bit 2)
Addresses gos sgtal
[2a
P33
SENSES | 1 | Key senso signal (bit 3)
Be |. Aes
A2D2
| HO wit 2)
25
P34
'SENSES
|_| Key sense signal (bit 4)
=
er
aii
Vo | Address/data bus sigral
26
P35:
SENSES
|_| Key sense signal (bit 5)
(bit 1)
27
P36
SENSE6
|_| Key sense signal (bit 6)
538 | ao/Do
A0/DO
vo | Address/data bus signal
28
P37
SENSE?
_ | _ 1 _ | Key sense signal (bit 7)
(bit 0) "os
29 | RESET
RESET
|_| System reset signal
59 | woout | woouT
| 0 Baral log timer outpvt
so | XIN
XIN
\ Saleen
a
ee
_
| | Cartage origin detecinng
signal
XOUT
ae
rol eager pte
1 | Pot
HM
© | Hammer drive signal
Power source (GND)
62
Po2
BDRV
(© | Buzzer drive signal
63
P03
To
°
FDC data transmission
halt signal
Power source (+5V)
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