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Regulator with Digital Power System Management

FEATURES

Quad Digitally Adjustable Analog Loops with Digital
n
Interface for Control and Monitoring
Wide Input Voltage Range: 4.5V to 14V
n
Output Voltage Range: 0.3V to 0.7V
n
±0.5% DC Output Accuracy at 0.7V
n
±4.5% Current Readback Accuracy: 0°C to 125°C
n
Optimized for Low Output Voltage Ranges
n
400kHz PMBus-Compliant I
n
Supports Telemetry Polling Rates Up to 125Hz
n
Integrated 16-Bit ∆Σ ADC
n
Parallel and Current Share Multiple Modules
n
15mm × 22mm × 5.71mm BGA Package
n
Readable Data
Input and Output Voltages, Currents, and Temperatures
n
Running Peak Values, Uptime, Faults, and Warnings
n
Onboard EEPROM Fault Log Record
n
Writable Data and Configurable Parameters
Output Voltage, Voltage Sequencing, and Margining
n
Digital Soft-Start/Soft-Stop Ramp, Program Analog Loop
n
OV/UV/OT, UVLO, Frequency and Phasing
n

APPLICATIONS

Multi-Rail Processor Power, Configurable Core Power
n

TYPICAL APPLICATION

Quad 31.25A µModule Regulator with Digital Interface for Control and Monitoring
4.5V TO 14V
+
IN_01
22µF
R
×6
SENSE1
IN_01
V
IN01
SV
IN_01
+
IN_23
22µF
R
×6
SENSE2
IN_23
V
IN23
SV
IN_23
V
IN_VBIAS
RUNP
ON/OFF CONTROL
RUN0,1,2,3
FAULT INTERRUPTS
FAULT0,1,2,3
POWER GOOD MONITORS
PGOOD0,1,2,3
(FROM 4.5V TO 5.5V
CONNECT V
, SV
,
IN
IN
AND INTV
TOGETHER)
CC
FOR COMPLETE CIRCUIT
SYNCHRONIZATION TIME
SEE FIGURE 48
BASE REGISTER WRITE
PROTECTION
Document Feedback
Low V
Quad 31.25A or Single 125A µModule
OUT
2
C Serial Interface
LTM4683
2
I
C/SMBus I/F WITH PMBus COMMAND
SET TO/FROM IPMI OR OTHER
BOARD MANAGEMENT CONTROLLER
For more information

DESCRIPTION

The
LTM
4683
is a quad 31.25A or single 125A step-
®
down µModule
(power micromodule) DC/DC regulator
®
featuring remote configurability and telemetry monitor-
ing of power management parameters over PMBus. The
LTM4683 is comprised of digitally programmable analog
control loops, and is optimized for higher bandwidth and
transient response.
The LTM4683's 2-wire serial interface allows outputs
to be margined, tuned, and ramped up and down at
programmable slew rates with sequencing delay times.
True input current sense, output currents and voltages,
output power, temperatures, uptime and peak values are
readable. Custom configuration of the EEPROM contents
is not required. At start-up, output voltages, switching
frequency, and channel phase angle assignments can be
set by pin-strapping resistors. The
user interface (GUI),
DC1613A
and evaluation kits are available.
The LTM4683 is offered in a 15mm × 22mm × 5.71mm BGA
package available with a RoHS-compliant terminal finish.
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. Patents including 5408150, 5481178, 5705919, 5929620, 6144194, 6177787, 6580258,
7420359, 8163643. Licensed under U.S. Patent 7000125 and other related patents worldwide.
0.4V AT 31.25A
V
OUT0
CER
+
V
+
OSNS0
LOAD
C
BULK
V
OSNS0
0.5V AT 31.25A
V
OUT1
CER
+
V
+
OSNS1
LOAD
C
BULK
V
OSNS1
0.6V AT 31.25A
V
OUT2
CER
+
V
+
OSNS2
LOAD
C
BULK
V
OSNS2
0.7V AT 31.25A
V
OUT3
CER
+
V
+
OSNS3
LOAD
C
BULK
V
Configurable Output Array
OSNS3
31.25A
4683 TA01a
31.25A
31.25A
31.25A
www.analog.com
LTM4683
LTpowerPlay
graphical
®
USB-to-PMBus converter,
Channel Efficiency vs Load Current
100
95
90
85
80
75
12V
, 0.3V
, 250kHz
IN
OUT
70
12V
, 0.4V
, 350kHz
IN
OUT
12V
, 0.5V
, 425kHz
IN
OUT
65
12V
, 0.6V
, 500kHz
IN
OUT
12V
, 0.7V
, 575kHz
IN
OUT
60
0
5
10
15
20
25
LOAD CURRENT (A)
62.5A
62.5A
93.75A
31.25A
62.5A
31.25A
31.25A
30
35
4683 TA01b
125A
Rev. 0
1

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Summary of Contents for Analog Devices LTM4683

  • Page 1: Features

    Output Voltage, Voltage Sequencing, and Margining and evaluation kits are available. Digital Soft-Start/Soft-Stop Ramp, Program Analog Loop The LTM4683 is offered in a 15mm × 22mm × 5.71mm BGA OV/UV/OT, UVLO, Frequency and Phasing package available with a RoHS-compliant terminal finish.
  • Page 2: Table Of Contents

    TABLE OF CONTENTS Features ............. 1 Table 3. FSWPH_nn_CFG Pin Strapping Look-Up Applications ..........1 Table to Set the LTM4683’s Switching Frequency Typical Application ........1 and Channel Phase-Interleaving Angle (Not Description..........1 Applicable if MFR_CONFIG_ALL[6] = 1b), nn = 01 Absolute Maximum Ratings ......
  • Page 3 PolyPhase Configuration ........64 Connecting The USB to I C/SMBus/PMBus Controller Fault Responses Output Current ......105 to the LTM4683 In System ........64 Fault Responses IC Temperature ......106 LTpowerPlay: An Interactive GUI for Digital Power .65 Fault Responses External Temperature ....107 PMBus Communication and Command Processing 65 Fault Sharing ............
  • Page 4: Absolute Maximum Ratings

    LTM4683 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) Terminal Voltages TOP VIEW − (Note 4), SV INnn IN_nn IN_nn IN_nn , RUNP ........–0.3V to 16V IN_VBIAS − – I ), (I – I ) ..–0.3V to 0.3V IN_nn...
  • Page 5: Electrical Characteristics

    LTM4683 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V , SV = 12V, RUNn = 3.3V, RUNP = 12V, FREQUENCY_SWITCH = 425kHz and V commanded to 0.5V unless otherwise noted.
  • Page 6 LTM4683 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V , SV = 12V, RUNn = 3.3V, RUNP = 12V, FREQUENCY_SWITCH = 425kHz and V commanded to 0.5V unless otherwise noted.
  • Page 7 LTM4683 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V , SV = 12V, RUNn = 3.3V, RUNP = 12V, FREQUENCY_SWITCH = 425kHz and V commanded to 0.5V unless otherwise noted.
  • Page 8 LTM4683 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V , SV = 12V, RUNn = 3.3V, RUNP = 12V, FREQUENCY_SWITCH = 425kHz and V commanded to 0.5V unless otherwise noted.
  • Page 9 LTM4683 ELECTRICAL CHARACTERISTICS denotes the specifications which apply over the specified internal operating temperature range (Note 2). Specified as each individual output channel (Note 4). T = 25°C, V , SV = 12V, RUNn = 3.3V, RUNP = 12V, FREQUENCY_SWITCH = 425kHz and V commanded to 0.5V unless otherwise noted.
  • Page 10 Note 2: The LTM4683 is tested under pulsed-load conditions such that Note 3: All currents into the device pins are positive; all currents out of  ≈ T .
  • Page 11 Channel 0 and Channel 1 switching power stages, accessed through the READ_DUTY_CYCLEn command codes. This data format limits the resolution of telemetry readback data to 10 bits, even though the internal ADC is 16 bits and the LTM4683’s CODE internal calculations use 32-bit words.
  • Page 12: Typical Performance Characteristics

    LTM4683 TYPICAL PERFORMANCE CHARACTERISTICS = 25°C, unless otherwise noted. Single Channel Efficiency, 5V = SV = INTV = 5V, Single Channel Efficiency, 8V RUNP = 0V, Continuous- = SV = 8V, IN_VBIAS Conduction Mode (CCM) RUNP = 8V, CCM , 0.3V , 250kHz , 0.3V...
  • Page 13 LTM4683 TYPICAL PERFORMANCE CHARACTERISTICS = 25°C, unless otherwise noted. Single Channel Load Transient Single Channel Load Transient Response (0A) to (10A) Load Response (0A) to (10A) Load Step, Step, 10A/µs, V  = 12V, 10A/µs, V  = 12V, V  = 0.4V,  = 0.3V, f = 250kHz...
  • Page 14 LTM4683 TYPICAL PERFORMANCE CHARACTERISTICS = 25°C, unless otherwise noted. Quad Output Concurrent Rail, Quad Output Concurrent Rail, Start-Up, Pre-Bias Start-Up, Pre-Bias = 0.7V = 0.7V OUT3 OUT3 = 0.6V = 0.6V OUT2 OUT2 = 0.5V = 0.5V OUT1 OUT1 = 0.4V = 0.4V...
  • Page 15: Pin Functions

    OUT0,1 OUT2,3 output capacitors to this point. Configuration Pin for Channel 0 and Channel 1. If this pin is left open—or, if the LTM4683 is configured to ignore (A5-A6, B5-B6, C5-C6, D5-D6, E5-E6, F5-F6, IN01 pin-strap (R ) resistors, i.e., MFR_CONFIG_ALL[6] =...
  • Page 16 OUT2 Coarse Setting. If the VOUT2_CFG and VTRIM2_CFG pins default NVM setting of MFR_CONFIG_ALL[6] = 0b) allows are both left open—or, if the LTM4683 is configured to a convenient way to configure multiple LTM4683s with ignore pin-strap (R ) resistors, i.e., MFR_CONFIG_...
  • Page 17 Coarse Setting. If the VOUT1_CFG and VTRIM1_CFG pins Minimize capacitance especially when the pin is left open are both left open—or, if the LTM4683 is configured to ignore to ensure accurate detection of the pin state. Note that pin-strap (R ) resistors, i.e., MFR_CONFIG_ALL[6] =...
  • Page 18 SDA_01 is for Channel 0 and Channel 1, the respective outputs of the LTM4683. These open- and SDA_23 is for Channel 2 and Channel 3. drain output pins hold the pin low until the LTM4683 is ALERT_01, ALERT_23 (C11, W8): Open-Drain Digital out of reset and SV...
  • Page 19 MFR_CONFIG_ALL[1] = lers. SGND is not internally connected to GND. Connect 1b. The factory-default NVM configuration setting has SGND to GND local to the LTM4683. See the Layout MFR_CONFIG_ALL[1] = 0b: clock stretching disabled. Checklist/Example section.
  • Page 20 COMP0a, COMP1a, COMP2a, COMP3a (G11, G9, T8, to bias internal control circuits and the MOSFET IN_01 V11): Loop Compensation Nodes. The internal PWM drivers of the LTM4683’s Channel 0 and Channel 1. An loop compensation resistors R of the LTM4683 COMPn external 4.7µF ceramic decoupling capacitor is required.
  • Page 21 MOSFET drivers of the from V . Otherwise, these sources will get DD25_23 BIAS LTM4683’s Channel 2 and Channel 3. An external 4.7µF their power from SV and SV . This will allow pro- IN_01 IN_23 ceramic decoupling capacitor is required.
  • Page 22 LTM4683 PIN FUNCTIONS high on these pins enables the respective outputs of the (R11): Channel 3 Positive Differential Voltage OSNS3 – LTM4683. These open-drain output pins hold the pin low Sense Input. Together, V and V serve to OSNS3 OSNS3...
  • Page 23: Simplified Block Diagram

    SEE TABLES 1, 2 AND 3. VOUT1_CFG PULL-UP NOT SHARE_CLK_01, SHARE_CLK_23 SHOWN VOUT2_CFG, VOUT3_CFG WP_01, WP_23 4683 F02 Figure 2. Simplified LTM4683 Block Diagram of the 1/2 Function DECOUPLING REQUIREMENTS = 25°C. Using Figure 2 configuration. SYMBOL PARAMETER CONDITIONS UNITS External High-Frequency Input Capacitor Requirement = 31.25A...
  • Page 24: Functional Diagram

    LTM4683 FUNCTIONAL DIAGRAM Figure 3. Functional LTM4683 Block Diagram Rev. 0 For more information www.analog.com...
  • Page 25: Test Circuits

    LTM4683 TEST CIRCUITS DD33_01 4.7µF 22µF C/SMBus I/F WITH PMBus COMMAND SET TO/FROM IPMI OR OTHER BOARD 4.99k 4.99k 4.99k 4.99k MANAGEMENT CONTROLLER 4.7µF *RUNP CAN BE CONNECTED TO GND FOR ALL V , BUT EFFICIENCY WILL BE IMPROVED BY CONNECTING RUNP TO 0.5V AT 31.25A...
  • Page 26 LTM4683 TEST CIRCUITS IN_01 4.7µF DD33_01 IN_23 C/SMBus I/F WITH PMBus COMMAND 4.99k 4.99k 4.99k 4.99k SET TO/FROM IPMI OR OTHER BOARD 4.7µF MANAGEMENT CONTROLLER VIN_ON ≤ 4.5V (0xCA40) 0.5V AT 31.25A ADJUSTABLE TO 0.7V OUT0 100µF , 4.5V TO 5.75V OSNS0 ×5...
  • Page 27: Operation

    LTM4683 OPERATION POWER MODULE INTRODUCTION Fault Logging The LTM4683 is a highly configurable quad 31.25A output Programmable Output Voltage standalone nonisolated switching mode step-down DC/ Programmable Input Voltage On/Off Threshold DC power supply with built-in EEPROM NVM with ECC Voltage...
  • Page 28: Eeprom With Ecc

    STRESS Example: Calculate the effect on retention when operating EEPROM WITH ECC at a junction temperature of 130°C for 10 hours. The LTM4683 contains internal EEPROM with error cor- = 130°C STRESS rection coding (ECC) to store user configuration set- = 125°C,...
  • Page 29: Power-Up And Initialization

    The Channel 0 to Channel 3 is accomplished with a capaci- RUNn and FAULTn, and PGOODn are held low. The LTM4683 tor connection from COMPna to SGND and a capacitor will use the contents of Table 1–Table 5 to determine the from COMPnb to SGND.) The COMPnb pin is for the...
  • Page 30: Soft-Start

    When the RUNn pin is cares about synchronization between chips, it is best not pulled low, the LTM4683 will hold the pin low for the MFR_ only to connect all the respective RUNn pins together but RESTART_DELAY.
  • Page 31: Voltage-Based Sequencing

    It is possible to tion states or through user intervention. feed the PGOODn pin from one LTM4683 channel into the There are two ways to respond to faults, retry mode and RUNn pin of the next LTM4683 channel in the sequence, latched-off mode.
  • Page 32: Switching Frequency And Phase

    The internal PWM loop compensation resistors R COMP control to this timing reference with proper phase relation, of the LTM4683 can be adjusted using bit[4:0] of the whether the clock is provided internally or externally. The MFR_PWM_COMP command for each controller.
  • Page 33: Intv Cc /Vbias Power

    INPUT CURRENT SENSING of 7V per controller drop across the internal controller, To sense the total input current consumed by the LTM4683’s when multiplied by 50mA, equals a 350mW power loss. power stages, a sense resistor is placed between the supply This loss can be eliminated by utilizing the V regulator.
  • Page 34: Polyphase Load Sharing

    LTM4683s con- The VOUTn_CFG pin settings are described in Table 1. trollers. The other(s) should be programmed to disable These pins set the LTM4683 V to V output voltage OUT0 OUT3 SYNC_nn controllers using bit 4 of MFR_CONFIG_ALL.
  • Page 35: Config_All[6] = 1B) Top Resistor = 14.3K

    The ASEL_nn pin settings are described in Table  4. 12.7 49.5 ASEL_ nn selects the subordinate address for the 10.7 37.125 LTM4683 internal controller. For more details, see Table 5. 9.09 24.75 7.68 12.375 NOTE: Per the PMBus specification, pin-programmed 6.34 –12.375...
  • Page 36: Or 23 Channels, Set Top Resistor To 14.3K

    LTM4683 OPERATION Table 3. FSWPH_nn_CFG Pin Strapping Look-Up Table to Set the LTM4683’s Switching Frequency and Channel Phase-Interleaving Angle (Not Applicable if MFR_CONFIG_ALL[6] = 1b), nn = 01 or 23 Channels, Set Top Resistor to 14.3k. SWITCHING BITS [2:0] OF BIT [4] OF FSWPH_CFG (kΩ)
  • Page 37: Setting)

    All PMBus device addresses listed in the specification are 7 bits wide unless otherwise noted. Input OV Fault Protection and UV Warning NOTE: The LTM4683 will always respond to subordinate addresses 0x5A and 0x5B, regardless of the NVM or ASEL resistor configuration values. Average Input Overcurrent Warn value indicated is nominal.
  • Page 38: Status Registers And Alert Masking

    With some exceptions, the SMBALERT_MASK command when a fault is detected. can be used to prevent the LTM4683 from asserting ALERT_nn for bits in these registers on a bit-by-bit basis. Output and input fault event handling is controlled by the These mask settings are promoted to STATUS_WORD corresponding fault response byte as specified in Table 17...
  • Page 39 EEPROM ECC Status Reserved Reserved Reserved Reserved DESCRIPTION MASKABLE GENERATES ALERT BIT CLEARABLE General Fault or Warning Event General Non-Maskable Event Dynamic Status Derived from Other Bits Not Directly Figure 5. LTM4683 Status Register Summary per Controller Rev. 0 For more information www.analog.com...
  • Page 40: Mapping Faults To Faultn Pins

    Power Good Pins 2) write byte, 3) write word, 4) group, 5) read byte, 6) The PGOODn pins of the LTM4683 are connected to the read word, and 7) read block. 8) write block. All read open drains of internal MOSFETs. The MOSFET turns on and...
  • Page 41: Device Addressing

    PMBus main device communicating with a single instance IIN_CAL_GAIN command. If this calculated input current of an LTM4683. The value of the device address is set by exceeds the IN_OC_WARN_LIMIT, the ALERT_nn pin is a combination of the ASEL_nn configuration pin and the pulled low, and the IIN_OC_WARN bit is asserted in the MFR_ADDRESS command.
  • Page 42: Output Undervoltage Response

    Since internal DCR sensing is used, the COMPn maximum set for the user. See Table 21. voltage has a temperature dependency directly propor- tional to the TC of the DCR of the inductor. The LTM4683 automatically monitors the external temperature sensors RESPONSES TO V...
  • Page 43: Responses To Ot/Ut Faults

    Ignore has been issued. Shut Down Immediately—Latch Off When the LTM4683 powers up or exits its reset state, it Shut Down Immediately—Retry Indefinitely at the Time checks the NVM for a valid fault log. If a valid fault log exists in NVM, the “Valid Fault Log” bit in the STATUS_ Interval Specified in MFR_RETRY_DELAY.
  • Page 44: Bus Timeout Protection

    External pull- all devices sharing the serial bus interface. The LTM4683 up resistors or current sources are required on these supports the full PMBus frequency range from 10kHz lines.
  • Page 45 LTM4683 OPERATION SU(DAT) HD(SDA) HD(STA) SU(STA) SU(STO) HD(DAT) HIGH 4683 F06 START REPEATED START STOP START CONDITION CONDITION CONDITION CONDITION Figure 6. PMBus Timing Diagram Table 6. Abbreviations of Supported Data Formats See Table 7 See Table 7 See Table 7 PMBus SPECIFICATION TERMINOLOGY REFERENCE...
  • Page 46 LTM4683 OPERATION START CONDITION REPEATED START CONDITION READ (BIT VALUE OF 1) WRITE (BIT VALUE OF 0) ACKNOWLEDGE (THIS BIT POSITION MAY BE 0 FOR AN ACK OR 1 FOR A NACK) STOP CONDITION PEC PACKET ERROR CODE MAIN TO SUBORDINATE...
  • Page 47 LTM4683 OPERATION SUBORDINATE ADDRESS Wr A COMMAND CODE A Sr SUBORDINATE ADDRESS DATA BYTE 4683 F15 Figure 15. Read Byte Protocol SUBORDINATE ADDRESS Wr A COMMAND CODE A Sr SUBORDINATE ADDRESS DATA BYTE 4683 F16 Figure 16. Read Byte Protocol with PEC...
  • Page 48 LTM4683 OPERATION SUBORDINATE ADDRESS Wr A COMMAND CODE BYTE COUNT = M DATA BYTE 1 … DATA BYTE 2 … DATA BYTE M … SUBORDINATE ADDRESS Rd A BYTE COUNT = N DATA BYTE 1 … … DATA BYTE 2 …...
  • Page 49: Pmbus Command Summary

    LTM4683 PMBus COMMAND SUMMARY PMBus COMMANDS supported by the manufacturer. Attempting to access non- supported or reserved commands may result in a CML Table 7 lists supported PMBus commands and manufac- command fault event. All output voltage settings and mea- turer-specific commands. A complete description of these surements are based on the VOUT_MODE setting of 0x14.
  • Page 50 LTM4683 PMBus COMMAND SUMMARY Table 7. PMBus Commands Summary (NOTE: The Data Format Abbreviations are Detailed in Table 8) DATA DEFAULT COMMAND NAME CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE PAGE VOUT_MARGIN_HIGH 0x25 Margin high output voltage set point. It R/W Word 0.525...
  • Page 51 LTM4683 PMBus COMMAND SUMMARY Table 7. PMBus Commands Summary (NOTE: The Data Format Abbreviations are Detailed in Table 8) DATA DEFAULT COMMAND NAME CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE PAGE VIN_UV_WARN_LIMIT 0x58 Input supply undervoltage warning limit. R/W Word 4.65...
  • Page 52 0x98 PMBus revision is supported by this R Byte 0x22 device. The current revision is 1.2. MFR_ID 0x99 The manufacturer ID of the LTM4683 in R String ASCII. MFR_MODEL 0x9A Manufacturer part number is in ASCII. R String MFR_VOUT_MAX 0xA5 Maximum allowed output voltage including R Word 2.75...
  • Page 53 C address byte, Ch 2 and 3 R/W Byte 0x4E MFR_SPECIAL_ID 0xE7 Manufacturer code representing the R Word 0x4191 LTM4683 and revision MFR_IIN_CAL_GAIN 0xE8 The resistance value of the input current R/W Word mΩ sense element in mΩ. 0xC200 MFR_FAULT_LOG_STORE...
  • Page 54 Note 2: Commands with a default value of NA indicate “not applicable”. Commands with a default value of FS indicate “factory set on a per part basis”. Note 3: The LTM4683 contains additional commands not listed in Table 7. Reading these commands is harmless to the operation of the IC; however, the contents and meaning of these commands can change without notice.
  • Page 55: Applications Information

    V step- down ratio that can be achieved for a given input voltage. OUTPUT CAPACITORS Each output of the LTM4683 is capable of a 95% duty cycle at 500kHz, but the V to V minimum dropout The LTM4683 is designed for low output voltage ripple is still a function of its load current and will limit output noise and good transient response.
  • Page 56: Switching Frequency And Phase

    SYNC pin becomes a high impedance input only—i.e., the inductor current is allowed to reverse at light loads or it does not drive SYNC low. The LTM4683 module syn- under large transient conditions. The peak inductor cur- chronizes its frequency to the clock applied to its SYNC rent is determined solely by the voltage on the COMPn pin.
  • Page 57: Output Current Limit Programming

    MFR_PWM_CONFIG[2:0] are not available by resistor LIMIT details in the PMBus Command Details section. pin-strapping the FSWPH_nn_CFG pin. All combinations The LTM4683 has two ranges of current limit program- of supported values for FREQUENCY_SWITCH and MFR_ ming. The value of MFR_PWM_MODE[2] is reserved, and...
  • Page 58: Minimum On-Time Considerations

    , is the smallest time dura- ON(MIN) commanded voltage set point. The rise time of the voltage tion that the LTM4683 is capable of turning on the top ramp can be programmed using the TON_RISEn command MOSFET. It is determined by internal timing delays and to minimize inrush currents associated with the start-up the gate charge required to turn on the top MOSFET.
  • Page 59: Soft Off (Sequenced Off)

    SOFT OFF (SEQUENCED OFF) from discontinuous to the programmed mode, as indi- cated in MFR_PWM_MODE bit 0. See Figure 25 for details In addition to a controlled start-up, the LTM4683 also on the V waveform under time-based sequencing. If supports controlled turn-off. The TOFF_DELAY and TOFF_ the TON_MAX_FAULT_LIMIT is set to a value greater than FALL functions are shown in Figure 26.
  • Page 60: Undervoltage Lockout

    TGn goes low, and BGn is asserted. the part, this can be interpreted as a CML fault. If a CML Fault logging is available on the LTM4683. The fault log- fault is detected, ALERTnn is asserted low. ging is configurable to automatically store data when a It is possible to program the contents of the NVM in the fault occurs that causes the unit to fault off.
  • Page 61: Open-Drain Pins

    0.8V; thus, there is plenty of margin on the digital signals with 3mA of current. For 3.3V pins, 3mA The LTM4683 has a phase-locked loop (PLL) comprised of current is a 1.1k resistor. Unless there are transient...
  • Page 62: Input Current Sense Amplifier

    INPUT CURRENT SENSE AMPLIFIER over the whole frequency range without moving the pole The LTM4683 input current sense amplifier can sense and zero location, as shown in Figure 28. the supply current into the V...
  • Page 63 LTM4683 APPLICATIONS INFORMATION closed-loop response test point. The DC step, rise time and settling time at this test point truly reflect the closed- loop response. Assuming a predominantly second-order system, phase margin and/or damping factor can be – estimated using the percentage of overshoot seen at this COMPn pin.
  • Page 64: Polyphase Configuration

    (DC1613A LOAD Thus, a 10µF capacitor would require a 250µs rise time, or equivalent) can be interfaced with the LTM4683 on limiting the charging current to about 200mA. the user’s board for programming, telemetry, and sys- tem debugging. The adapter, when used in conjunction...
  • Page 65: Ltpowerplay: An Interactive Gui For Digital Power

    When the part receives a new command from the bus, it copies the data into the write The LTM4683 is fully isolated from the host PC’s ground command data buffer, indicates to the internal processor by the DC1613A. The 3.3V from the adapter and the...
  • Page 66 LTM4683 APPLICATIONS INFORMATION Figure 31. LTpowerPlay Screen Shot WRITE COMMAND DATA BUFFER PMBus DECODER INTERNAL WRITE CHANNEL# IDENTITY PAGE 0x00 PROCESSOR • U0:A0 CMDS FETCH, • • U0:A1 CONVERT 0x21 DATA DATA VOUT_COMMAND U1:B0 U1:B1 • EXECUTE • • MFR_RESET 0xFD...
  • Page 67: Thermal Considerations And Output Current Derating

    Specification v1.1, Par II, Section 10.8.7 is required to can make writing system-level software somewhat com- communicate. The LTM4683 is not recommended in plex. The part provides three “hand shaking” status bits, applications with bus speeds in excess of 400kHz.
  • Page 68 LTM4683 APPLICATIONS INFORMATION performed on a µModule package mounted to a hardware 2. θ , the thermal resistance from the junction to JCbottom test board defined by JESD51-9 (“Test Boards for Area the bottom of the product case, is determined with all Array Surface Mount Package Thermal Measurements”).
  • Page 69 The junctions are of the LTM4683 and the specified PCB with all of the cor- maintained at 125°C maximum while lowering output cur- rect material coefficients along with accurate power loss rent or power while increasing ambient temperature.
  • Page 70 LTM4683 APPLICATIONS INFORMATION , 0.4V , 350kHz , 0.4V , 350kHz , 0.4V , 350kHz , 0.6V , 500kHz , 0.6V , 500kHz , 0.6V , 500kHz , 0.7V , 575kHz , 0.7V , 575kHz , 0.7V , 575kHz OUTPUT CURRENT (A)
  • Page 71 LTM4683 APPLICATIONS INFORMATION 0LFM 0LFM 0LFM 200LFM 200LFM 200LFM 400LFM 400LFM 400LFM (°C) (°C) (°C) 4683 F44 4683 F45 4683 F46 Figure 44. 5V to 0.7V Figure 46. 12V to 0.7V Figure 45. 8V to 0.7V Derating Curve, No Heat Sink Derating Curve, No Heat Sink Derating Curve, No Heat Sink power loss curve at 84A (See Figure 37), with the 1.35...
  • Page 72 LTM4683 APPLICATIONS INFORMATION Rev. 0 For more information www.analog.com...
  • Page 73 LTM4683 APPLICATIONS INFORMATION Rev. 0 For more information www.analog.com...
  • Page 74 LTM4683 APPLICATIONS INFORMATION Rev. 0 For more information www.analog.com...
  • Page 75 LTM4683 APPLICATIONS INFORMATION Rev. 0 For more information www.analog.com...
  • Page 76: Emi Performance

    C should be NPO, C0G or X7R-type (or better) material. The high integration of LTM4683 makes the PCB board layout very simple and easy. However, to optimize its elec- The snubber resistor (R ) value is then given by Equation 8.
  • Page 77 Figure 47 gives a good example of the recommended layout. OUT0 OUT1 OUT2 OUT3 OUT0 OUT1 OUT2 OUT3 4683 F47a 4683 F47b (a) LTM4683 Top Layer (b) LTM4683 Bottom Layer Figure 47. Recommended PCB Layout Package, Top View Rev. 0 For more information www.analog.com...
  • Page 78: Typical Applications

    LTM4683 TYPICAL APPLICATIONS DD33_01 4.7µF 22µF C/SMBus I/F WITH PMBus COMMAND 4.99k 4.99k 4.99k 4.99k 4.99k SET TO/FROM IPMI OR OTHER BOARD 4.7µF MANAGEMENT CONTROLLER 0.7V AT 31.25A OUT0 100µF 560µF , 6V TO 12V OSNS0 ×4 ×4 IN_01 LOAD 22µF...
  • Page 79 LTM4683 TYPICAL APPLICATIONS DD33_01 4.7µF 22µF C/SMBus I/F WITH PMBus COMMAND 4.99k 4.99k 4.99k 4.99k 4.99k SET TO/FROM IPMI OR OTHER BOARD 4.7µF MANAGEMENT CONTROLLER 0.6V AT 60A OUT0 , 6V TO 12V 100µF IN_01 ×3 22µF 150µF ×8 OSNS0 –...
  • Page 80 SUBORDINATE DEVICE 2,3 ADDRESS:100_1100_R/W CHANNEL3: g = 2.35mS, R = 8k, FREQ = 575kHz COMP Figure 50. Two Paralleled LTM4683 Producing 0.7V at 250A. Integrated Power System Management Features Accessible Over 2-Wire I C/SMBus/PMBus Serial Interface Rev. 0 For more information...
  • Page 81 LTM4683 TYPICAL APPLICATIONS DD33_01 IN_01 IN_23 C/SMBus I/F WITH PMBus COMMAND 4.99k 4.99k 4.99k 4.99k 4.99k 4.7µF 4.7µF SET TO/FROM IPMI OR OTHER BOARD MANAGEMENT CONTROLLER 0.45V AT 60A IN_01 OUT0 100µF 22µF 150µF ×4 ×6 ×2 – IN_01 OSNS0...
  • Page 82 MFR_CONFIG_ALL BIT[4] = 1 SUBORDINATE DEVICE 2,3 ADDRESS:100_1110_R/W Figure 52. 6-Phase Operation Producing 0.7V at 185A, 0.6V at 30A, and 0.5V at 30A. Power System Management Features Accessible through LTM4683 Over 2-Wire I C/SMBus/PMBus Serial Interface Rev. 0 For more information...
  • Page 83: Pmbus Command Details

    Each of the ASEL pins will have a different programmed address. Setting PAGE to 0xFF applies any following paged commands to both outputs. With PAGE set to 0xFF , the LTM4683 will respond to read commands as if PAGE were set to 0x00 (Channel 0 results).
  • Page 84 Figure 54. Example of PAGE_PLUS_READ NOTE: PAGE_PLUS commands cannot be nested. A PAGE_PLUS command cannot be used to read or write another PAGE_PLUS command. If this is attempted, the LTM4683 will NACK the entire PAGE_PLUS packet and issue a CML fault for Invalid/Unsupported Data.
  • Page 85: General Configuration Commands

    If the ASEL_01 and ASEL_23 pins are both open, the LTM4683 will use the address value stored in NVM. If the ASEL_nn pins are open, the LTM4683 will use the lower 4 bits of the MFR_ADDRESS value stored in NVM to construct the effective address of the part.
  • Page 86: On/Off/Margin

    LTM4683 PMBus COMMAND DETAILS A ShortCycle event occurs whenever the PWM channel is commanded back On or reactivated, after the part has been commanded Off and is processing either the TOFF_DELAY or the TOFF_FALL states. The PWM channel can be turned On/Off through the RUN pin or the PMBus OPERATION command.
  • Page 87 MFR_RESET This command provides a means to reset the LTM4683 from the serial bus. This forces the LTM4683 to turn off both PWM channels, load the operating memory from internal EEPROM, clear all faults and then perform a soft-start of both PWM channels, if enabled.
  • Page 88: Pwm Configuration

    Writing this bit when the channel is active will generate a CML fault. Bit [6] The LTM4683 will not servo while the part is Off, ramping on or ramping off. When set to one, the output servo is enabled.
  • Page 89 LTM4683 PMBus COMMAND DETAILS –14 G = MFR_TEMP_1_GAIN • 2 , and O = MFR_TEMP_1_OFFSET Bit[1] of this command determines if the part is in a high range or low voltage range. Changing this bit value changes the PWM loop gain and compensation. This bit value should not be changed when the channel output is active. Writing this bit when the channel is active will generate a CML fault.
  • Page 90 LTM4683 PMBus COMMAND DETAILS MEANING 10010b 10011b 10100b 10101b 10110b 10111b 11000b 11001b 11010b 11011b 11100b 11101b 11110b 11111b This command has one data byte. MFR_PWM_CONFIG The MFR_PWM_CONFIG command sets the switching frequency phase offset to the falling edge of the SYNC signal.
  • Page 91: Voltage

    LTM4683 PMBus COMMAND DETAILS FREQUENCY_SWITCH The FREQUENCY_SWITCH command sets the switching frequency, in kHz, of the LTM4683. Supported Frequencies RESULTING FREQUENCY (TYP) VALUE [15:0] (kHz) 0x0000 External Oscillator 0xF3E8 0xFABC 0xFB52 0xFBE8 0x023F 0x028A 0x02EE 0x03E8 1000 The part must be in the Off state to process this command. The RUN pin must be low, or both channels must be com- manded off.
  • Page 92: Output Voltage And Limits

    LTM4683 PMBus COMMAND DETAILS VIN_UV_WARN_LIMIT The VIN_UV_WARN_LIMIT command sets the value of input voltage measured by the ADC that causes an input under- voltage warning. This warning is disabled until the input exceeds the input startup threshold value set by the VIN_ON command and the unit has been enabled.
  • Page 93 If VOUT_OV_FAULT_RESPONSE is set to OV_PULLDOWN or 0x00, the FAULT pin will not assert if VOUT_OV_FAULT is propagated. The LTM4683 will pull the TG low and assert the BG bit as soon as the overvoltage condition is detected. This command has two data bytes and is formatted in Linear_16u format.
  • Page 94 LTM4683 PMBus COMMAND DETAILS VOUT_MARGIN_HIGH The VOUT_MARGIN_HIGH command loads the unit with the voltage to which the output will be changed, in volts, when the OPERATION command is set to “Margin High”. The value should be greater than VOUT_COMMAND. The maximum guaranteed value on VOUT_MARGIN_HIGH is 0.55V.
  • Page 95: Output Current And Limits

    LTM4683 PMBus COMMAND DETAILS MFR_VOUT_MAX The MFR_VOUT_MAX command is the maximum output voltage in volts for each channel, including VOUT_OV_FAULT_ LIMIT. If the output voltages are set to a high range (Bit 1 of MFR_PWM_MODE set to 0), MFR_VOUT_MAX is 3.6V. The (Bit 6 of MFR_PWM_CONFIG set to a 0) MFR_VOUT_MAX of 3.6V is not used since the outputs are limited to 0.7V.
  • Page 96 MFR_IOUT_CAL_GAIN_TC using the equation: Peak Current Limit = IOUT_CAL_GAIN • (1 + MFR_IOUT_CAL_GAIN_TC • (READ_TEMPERTURE_1-27.0)). The LTM4683 automatically convert currents to the appropriate internal bit value. The I range is set with bit 7 of the MFR_PWM_MODE command.
  • Page 97: Input Current And Limits

    LTM4683 PMBus COMMAND DETAILS IOUT_OC_WARN_LIMIT This command sets the value of the output current measured by the ADC that causes an output overcurrent warning in Amperes. The READ_IOUT value will be used to determine if this limit has been exceeded.
  • Page 98: Temperature

    LTM4683 PMBus COMMAND DETAILS TEMPERATURE Power Stage DCR Temperature Calibration DATA DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS NVM VALUE MFR_TEMP_1_GAIN 0xF8 Sets the slope of the external R/W Word 0.995 temperature sensor. 0x3FAE MFR_TEMP_1_OFFSET 0xF9 Sets the offset of the external R/W Word temperature sensor.
  • Page 99: Timing

    Values from 0 to 1.3 seconds are valid. The part will be in discontinuous mode during TON_RISE events. If TON_RISE is less than 0.25ms, the LTM4683 digital slope will be bypassed, and the output voltage transition will only be controlled by the analog performance of the PWM switcher. The number of steps in TON_RISE is equal to TON_RISE (in ms)/0.1ms with an uncertainty of ±0.1ms.
  • Page 100: Timing-Off Sequence/Ramp

    LTM4683 PMBus COMMAND DETAILS TON_MAX_FAULT_LIMIT The TON_MAX_FAULT_LIMIT command sets the value, in milliseconds, on how long the unit can attempt to power up the output without reaching the output undervoltage fault limit. A data value of 0ms means there is no limit, and the unit can attempt to bring up the output voltage indefinitely. The maximum limit is 83 seconds.
  • Page 101: Precondition For Restart

    MFR_RESTART_DELAY 0xDC Minimum time the RUN pin is held R/W Word low by the LTM4683. 0xF258 MFR_RESTART_DELAY This command specifies the minimum RUN off time in milliseconds. This device will pull the RUN pin low for this length of time once a falling edge of RUN has been detected. The minimum recommended value is 136ms.
  • Page 102: Fault Responses Input Voltage

    LTM4683 PMBus COMMAND DETAILS Fault Responses Input Voltage DATA DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS VALUE VIN_OV_FAULT_RESPONSE 0x56 Action to be taken by the device when an R/W Byte 0x80 input supply overvoltage fault is detected.
  • Page 103 Not supported. Writing this value will generate a CML fault. OPERATION command, to turn off and then to turn back on, or • Bias power is removed and reapplied to the LTM4683. Retry Setting The unit does not attempt to restart. The output remains disabled until the fault is cleared until the device is commanded OFF bias power is removed.
  • Page 104 Response The PMBus device continues operation without interruption. (Ignores the fault functionally) For all values of bits [7:6], the LTM4683: The PMBus device continues operation for the delay time • Sets the corresponding fault bit in the status commands and specified by bits [2:0] and the delay time unit specified for •...
  • Page 105: Fault Responses Output Current

    LTM4683 PMBus COMMAND DETAILS TON_MAX_FAULT_RESPONSE The TON_MAX_FAULT_RESPONSE command instructs the device on what action to take in response to a TON_MAX fault. The data byte is in the format as shown in Table 21. The device also: • Sets the NONE_OF_THE_ABOVE bit in the STATUS_BYTE •...
  • Page 106: Fault Responses Ic Temperature

    The LTM4683 continues to operate indefinitely while maintaining the output current at the value set by For all values of bits [7:6], the LTM4683: IOUT_OC_FAULT_LIMIT without regard to the output • Sets the corresponding fault bit in the status commands and voltage (known as constant-current or brick-wall limiting).
  • Page 107: Fault Responses External Temperature

    RUN pin and OPERATION command, to turn off and then to turn back on, or • Bias power is removed and reapplied to the LTM4683. Retry Setting The unit does not attempt to restart. The output remains disabled until the fault is cleared.
  • Page 108: Fault Sharing

    MEANING Response The PMBus device continues operation without interruption. For all values of bits [7:6], the LTM4683: Not supported. Writing this value will generate a CML fault. • Sets the corresponding fault bit in the status commands, and The device shuts down immediately (disables the output) and responds according to the retry setting in bits [5:3].
  • Page 109 LTM4683 PMBus COMMAND DETAILS Table 22. FAULTn Propagate Fault Configuration The FAULT0 and FAULT1 pins are designed to provide electrical notification of selected events to the user. Some of these events are common to both output channels. Others are specific to an output channel. They can also be used to share faults between channels.
  • Page 110: Fault Sharing Response

    Supported Values VALUE MEANING 0xC0 FAULT_INHIBIT The LTM4683 will three-state the output in response to the FAULT pin pulled low. 0x00 FAULT_IGNORE The LTM4683 continues operation without interruption. The device also: • Sets the MFR Bit in the STATUS_WORD.
  • Page 111: Identification

    The MFR_MODEL command indicates the manufacturer’s part number of the LTM4683 using ASCII characters. This read-only command is in block format. MFR_SPECIAL_ID The 16-bit word represents the part name and revision. 0x414 denotes the part is an LTM4683, and X is adjustable by the manufacturer. This read-only command has two data bytes.
  • Page 112: Fault Warning And Status

    LTM4683 PMBus COMMAND DETAILS FAULT WARNING AND STATUS DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS VALUE CLEAR_FAULTS 0x03 Clear any fault bits that have been set Send Byte SMBALERT_MASK 0x1B Mask activity Block R/W See CMD Details...
  • Page 113 LTM4683 PMBus COMMAND DETAILS would still set bit 6 of STATUS_TEMPERATURE but not assert ALERT. All other supported STATUS_TEMPERATURE bits would continue to assert ALERT if set. Figure 55 and Figure 56 show an example of the Block Write – Block Read Process Call protocol used to read back the present state of any supported status register, again without PEC.
  • Page 114 STATUS BIT NAME MEANING BUSY A fault was declared because the LTM4683 was unable to respond. This bit is set if the channel is not providing power to its output, regardless of the reason, including simply not being enabled. VOUT_OV An output overvoltage fault has occurred.
  • Page 115 STATUS_IOUT Message Contents MEANING overcurrent fault Not supported (LTM4683 returns 0) overcurrent warning Not supported (LTM4683 returns 0) The user is permitted to write a 1 to any bit in this command to clear a specific fault. This permits the user to clear status by means other than using the CLEAR_FAULTS command.
  • Page 116 MEANING External overtemperature fault External overtemperature warning Not supported (LTM4683 returns 0) External undertemperature fault Not supported (LTM4683 returns 0) The user is permitted to write a 1 to any bit in this command to clear a specific fault. This permits the user to clear status by means other than using the CLEAR_FAULTS command.
  • Page 117 Reserved Reserved ADC values invalid, occurs during start-up. May occur briefly on current measurement channels during normal operation. SYNC clocked by an external device (when LTM4683 configured to drive SYNC pin). Channel 1 Power Good Channel 0 Power Good LTM4683 Driving RUN1 Low...
  • Page 118: Telemetry

    MFR_CLEAR_PEAKS. MFR_READ_IIN_PEAK 0xE1 The maximum measured value of the READ_IIN R Word command since the last MFR_CLEAR_PEAKS. MFR_READ_ICHIP 0xE4 Measured current used by the LTM4683. R Word MFR_TEMPERATURE_2_PEAK 0xF4 Peak internal die temperature since the last R Word MFR_CLEAR_PEAKS. MFR_ADC_CONTROL...
  • Page 119 This read-only command has two data bytes and is formatted in Linear_5s_11s format. READ_TEMPERATURE_2 The READ_TEMPERATURE_2 command returns the LTM4683’s die temperature, in degrees Celsius, of the internal sense element. This read-only command has two data bytes and is formatted in Linear_5s_11s format.
  • Page 120 LTM4683 PMBus COMMAND DETAILS READ_PIN The READ_PIN command is a reading of the DC/DC converter input power in Watts. The PIN is calculated based on the most recent input voltage and current reading. This read-only command has 2 data bytes and is formatted in Linear_5s_11s format.
  • Page 121 If a reserved command value is entered, the telemetry will default to Internal IC Temperature and issue a CML fault. CML faults will continue to be issued by the LTM4683 until a valid command value is entered. The accuracy of the measured input supply voltage is only guaranteed if the MFR_ADC_CONTROL command is set to standard round-robin telemetry.
  • Page 122: Nvm Memory Commands

    To enable the part in this state, using global address 0x5B, write MFR_EE_UNLOCK to 0x2B followed by 0xC4. The LTM4683 will now communicate normally, and the project file can be updated. To write the updated project file to the NVM issue a STORE_USER_ALL command. When V is applied, an MFR_RESET must be issued to allow the PWM to be enabled and valid ADCs to be read.
  • Page 123: Fault Logging

    LTM4683 PMBus COMMAND DETAILS Fault Logging DATA DEFAULT COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS VALUE MFR_FAULT_LOG 0xEE Fault log data bytes. R Block MFR_FAULT_LOG_STORE 0xEA Command a transfer of the fault log from RAM Send Byte to EEPROM.
  • Page 124 Power stage temperature sensor 0 during the last event. [7:0] READ_TEMPERATURE1 (PAGE 1) [15:8] Power stage temperature sensor 1 during the last event. [7:0] READ_TEMPERATURE2 [15:8] LTM4683 die temperature sensor during the last event. [7:0] Rev. 0 For more information www.analog.com...
  • Page 125 LTM4683 PMBus COMMAND DETAILS Table 23. Fault Logging This table outlines the format of the block data from a read block data of the MFR_FAULT_LOG command. CYCLICAL DATA EVENT n Event “n” represents one complete cycle of ADC reads through the MUX (Data at Which Fault Occurred, Most Recent Data) at the time of the fault.
  • Page 126 LTM4683 PMBus COMMAND DETAILS Table 23. Fault Logging This table outlines the format of the block data from a read block data of the MFR_FAULT_LOG command. EVENT n-1 (Data Measured before Fault Was Detected) READ_VOUT (PAGE 0) [15:8] LIN 16 [7:0]...
  • Page 127: Block Memory Write/Read

    All the NVM commands are disabled if the die temperature exceeds 130°C. NVM commands are re-enabled when the die temperature drops below 125°C. MFR_EE_xxxx The MFR_EE_xxxx commands facilitate bulk programming of the LTM4683 internal EEPROM. Contact the factory for details. Rev. 0 For more information www.analog.com...
  • Page 128: Package Description

    LTM4683 PACKAGE DESCRIPTION PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY . Table 25. LTM4683 BGA Pinout PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID...
  • Page 129: Package Description

    LTM4683 PACKAGE DESCRIPTION Table 25. LTM4683 BGA Pinout PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION IN23 IN23 IN23 IN23 IN23 IN23 IN23 IN23 IN23 IN23 IN23 IN23 – COMP2a TSNS2...
  • Page 130 LTM4683 PACKAGE DESCRIPTION aaa Z Rev. 0 For more information www.analog.com...
  • Page 131: Revision History

    Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications For more information www.analog.com subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
  • Page 132: Package Photos

    2. Search using the Quick Power Search parametric table. Digital Power System Management Analog Devices’ family of digital power supply management ICs are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature EEPROM for storing user configurations and fault logging.

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