Introduction; Guidelines Of Schematic Design - Renesas DA16200 H/W User Manual

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UM-WI-006
DA16200 H/W Design Guide
1

Introduction

This document provides a set of guidelines that help users prepare schematics and PCB layouts for
products with the DA16200. Recommended schematic, chip interfaces, and surrounding components
as well as PCB layout guidelines of both devices are provided.
2

Guidelines of Schematic Design

The DA16200 application schematic includes the following five parts:
Power supply: Digital Power Supply, Analog Power Supply
RF: contains antenna part
Clock: Main Clock, RTC Clock
Flash interface
Digital I/O: GPIO pin assignment, can be changed based on application requirement
To choose the proper schematic, check the items below:
Package type: the DA16200 provides QFN and fcCSP packages
VDD of flash memory: 1.8 V and 3.3 V VDD of flash memory are possible with the DA16200.
When 1.8 V VDD of flash memory is applied, the DA16200 can control the flash memory through
VDD_FDIO/FDIO_LDO_OUT (QFN pin 20 and 21, fcCSP pin M4). When 3.3 V VDD of flash
memory is applied, additional switch is needed to control flash memory to achieve low power
Tx power mode: the fcCSP type can support normal or low Tx power mode. See 5.5 Current
Consumption in the DA16200 datasheet. For the application which doesn't need higher Tx power,
the low Tx power mode can be applied. The QFN type supports only normal Tx power mode. See
Sections
2.2.4
and
3.4
See Section
3
for information on each application.
User Manual
CFR0012
how to apply the low Tx power mode
Revision 1.5
6 of 44
NDA Confidential
11-Apr-2022
© 2022 Renesas Electronics

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