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Renesas DA16200 User Manual

Renesas DA16200 User Manual

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User Manual
DA16200 DA16600 Hardware
Design Guide
UM-WI-006

Abstract

This document describes the parts to be checked for hardware design of DA16200 and DA16600.
User Manual
Revision 1.6
12-Jan-2023
CFR0012
1 of 57
© 2023 Renesas Electronics

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  • Page 1: Abstract

    User Manual DA16200 DA16600 Hardware Design Guide UM-WI-006 Abstract This document describes the parts to be checked for hardware design of DA16200 and DA16600. User Manual Revision 1.6 12-Jan-2023 CFR0012 1 of 57 © 2023 Renesas Electronics...

  • Page 2: Table Of Contents

    UM-WI-006 NDA Confidential DA16200 DA16600 Hardware Design Guide Contents Abstract ..............................1 Contents ............................... 2 Figures ..............................4 Tables ..............................4 Terms and Definitions ........................6 References ............................. 6 Introduction............................ 7 Guidelines of Schematic Design ....................7 DA16200 and DA16200MOD ......................8 48-Pin QFN ...........................
  • Page 3 UM-WI-006 NDA Confidential DA16200 DA16600 Hardware Design Guide 5.10 RTC_GPO ........................... 28 5.11 GPIO Pin Multiplexing ......................28 5.12 Interface Pull-Up ......................... 29 5.12.1 I2C ........................29 5.12.2 SDIO ........................30 5.13 PCB Layout ......................... 31 5.13.1 Grounding ......................31 5.13.2...

  • Page 4: Figures

    NDA Confidential DA16200 DA16600 Hardware Design Guide Figures Figure 1: DA16200 QFN48 Pinout Diagram (Top View) ............... 8 Figure 2: DA16200 fcCSP72 Pinout Diagram (Top View) ..............9 Figure 3: Power Management Block Diagram..................12 Figure 4: Power on Sequence ......................13 Figure 5: High/Low TX Power Mode Connection ................
  • Page 5 Table 23: Data Direction Set (0x40010010) ..................43 Table 24: Data Out (0x40010004) ....................... 43 Table 25: DA16200 QFN Check list ....................44 Table 26: DA16200 fcCSP Check list ....................46 Table 27: DA16200MOD Check List for FreeRTOS SDK ..............49 Table 28: DA16600 Check list for FreeRTOS SDK ................

  • Page 6: Terms And Definitions

    Serial Peripheral Interface References DA16200, Datasheet, Renesas Electronics DA16200MOD, Datasheet, Renesas Electronics DA16600, Datasheet, Renesas Electronics UM-WI-011, DA16200 DA16600 Mass Production, User Manual, Renesas Electronics UM-WI-004, DA16200 AT GUI Tool User Manual, Renesas Electronics User Manual Revision 1.6 12-Jan-2023 CFR0012 6 of 57 ©...

  • Page 7: Introduction

    Package type: The DA16200 provides QFN and fcCSP packages ● VDD of flash memory: 1.8 V and 3.3 V flash memory can be supported with the DA16200. When a 1.8 V flash memory is applied, the DA16200 can control the flash memory directly through VDD_FDIO/FDIO_LDO_OUT (QFN pin 20 and 21, fcCSP pin M4).

  • Page 8: Da16200 And Da16200Mod

    DA16200MOD-AAC4WA32 contains an internal chip antenna ○ DA16200MOD-AAE4WA32 contains a u.FL connector for an external antenna Since the DA16200MOD is a module containing the DA16200 chipset, only the DA16200 contents will be described below. For more information on the DA16200MOD, see the DA16200MOD datasheet [2].

  • Page 9: 72-Pin Fccsp

    KE_UP2 DCDC_FB F_CSN F_IO2 TCLK F_IO3 GPIOC8 GPIOC7 F_CLK F_IO0 VDD_DI UART_T DCDC_LX F_IO1 GPIOC6 UART_R VDD_FDI VBAT DIO2 Figure 2: DA16200 fcCSP72 Pinout Diagram (Top View) User Manual Revision 1.6 12-Jan-2023 CFR0012 9 of 57 © 2023 Renesas Electronics...

  • Page 10: Pin Description

    UM-WI-006 NDA Confidential DA16200 DA16600 Hardware Design Guide Pin Description Table 1: Pin Description fcCSP Pin Name Type Drive Initial Description (mA) State #Pin #Pin (Table 2) (Note Ground VDD_ANA RF VDD RBIAS External reference resistor pin RF_XI 40 MHz crystal clock input...

  • Page 11: Table 2: Pin Type Definition

    UM-WI-006 NDA Confidential DA16200 DA16600 Hardware Design Guide fcCSP Pin Name Type Drive Initial Description (mA) State #Pin #Pin (Table 2) (Note GPIOA8 2/4/8/12 I-PD General Purpose I/O GPIOA7 2/4/8/12 I-PD General Purpose I/O GPIOA6 2/4/8/12 I-PD General Purpose I/O...

  • Page 12: Power Supply

    5.4.1 Power Management The DA16200 has one internal DC-DC converter and multiple LDOs to supply power to all internal sub-blocks. Power management performs the on-off control of these regulators and is implemented through the register setting inside the RTC block.

  • Page 13: Figure 4: Power On Sequence

    NDA Confidential DA16200 DA16600 Hardware Design Guide The RTC_PWR_KEY is a pin that enables the RTC block of DA16200. Once RTC_PWR_KEY is enabled after VBAT power is supplied, all the internal regulators are switched on automatically in the sequence pre-defined by the RTC block.

  • Page 14: Vbat

    5.4.2 VBAT The DA16200 can operate one source for an I/O interface and internal power source (LDO and DC- DC converter), so it is important to reduce the noise component on this power line. All the input de- coupling capacitors should be located nearby the DA61200 IC and the thickness of power traces should be higher than 0.3 mm.

  • Page 15: Vdd_Ana

    VDD_DIO1 and VDD_DIO2 These are the I/O voltage pins of the DA16200 chip should be set to the same voltage level as the I/O pins of a connected external device such as an MCU. The DA16200 can support both 1.8 V and 3.3 V for I/O voltage.

  • Page 16: Antenna

    Section 5.6.2 has details on the tested antenna components. 5.6.2 Antenna Information of DA16200MOD The DA16200 chip antenna type module (DA16200MOD-AAC4WA32) includes a 2.4 GHz chip type antenna. See the antenna information below. ● Part number: WALSIN RFECA32160AM1T62 ○...

  • Page 17: Figure 7: Tested Antenna Usage

    UM-WI-006 NDA Confidential DA16200 DA16600 Hardware Design Guide ● Tested Antenna Usage Example Figure 7: Tested Antenna Usage ● Radiation Pattern Figure 8: Tested Antenna Radiation Pattern User Manual Revision 1.6 12-Jan-2023 CFR0012 17 of 57 © 2023 Renesas Electronics...

  • Page 18: Rf Input Requirements

    5.7.1 RF Main Clock (40 MHz) The DA16200 has a crystal oscillator for the main clock source, which supports the external crystal clock. Basically, the external clock is 40 MHz. Make sure that the load capacitance is tuned based on the board parasitic so that the frequency tolerance is within ±20 ppm.

  • Page 19: 40 Mhz Rf Xtal Trimming

    40 MHz RF XTAL Trimming The 40 MHz crystal oscillator has trimming capability. The frequency is trimmed by two on-chip variable capacitor banks. Renesas provides AT GUI tool and the frequency can be tuned easily by the tool. The tool is available on the Renesas website.

  • Page 20: Figure 11: Setup For Transmitting Cw Tx Power

    3. On the OTP tab, check current internal load capacitor value of the DA16200. a. Select the OTP Enable checkbox. b. Click the Read XTAL button to check current internal capacitor value of the DA16200. ‘0x41’ is the value in this example.

  • Page 21: Rtc Clock (32.768 Khz)

    Wi-Fi specification is within ±20 ppm. See Ref. describes how to adopt the calibration on mass production. See section 5. XTAL Calibration of UM-WI-011 document. In the DA16200 module (DA16200MOD), RF XTAL is calibrated. So, customer doesn’t need to think about the calibration. 5.7.2 RTC Clock (32.768 KHz)

  • Page 22: Rtc Clock Using An External Clock

    C2 are installed with the value of 15 pF. 5.7.2.2 RTC Clock Using an External Clock When an RTC oscillator is present in the system, the DA16200 can accept this clock directly as an input. The clock is fed on the RTC_XO line via series capacitor. Figure 15 shows the external RTC input connection.

  • Page 23: Serial Flash Selection Guide

    NOTE The FreeRTOS SDK supports flash sizes greater than 4MB. Currently the DA16200 SDK supports SFDP tables for serial flashes listed in Table 10 below. User Manual Revision 1.6...

  • Page 24: Table 10: Recommended Serial Flash List

    FM25W32 1.8~3.3V Note 1 These parts support both low power and high-performance mode. The DA16200 supports only the part with high performance mode as default. See part name description of MX25R1635F below and refer to the datasheet for details. User Manual Revision 1.6...

  • Page 25: Figure 17: Part Name Description

    UM-WI-006 NDA Confidential DA16200 DA16600 Hardware Design Guide Figure 17: Part Name Description If customers want to use other types of serial flash, then the extraction (from serial flash specification) and optimization of the SFDP parameters is needed. And a new serial flash should be...

  • Page 26: External Control Pins

    When MCU controls this pin, the voltage level of control pin from MCU should be checked. For example, when the VBAT of the DA16200 is 3.3 V and the voltage level of control signal from MCU is 1.8 V, the RTC_PWR_KEY can’t be operated normally. In this case, the RTC_PWR_KEY can be controlled by VBAT with RC delay circuit.

  • Page 27: Rtc Wakeup Key (Rtc_Wake_Up And Rtc_Wake_Up2)

    This is an input pin for receiving an external event signal from an external device like a sensor. The RTC block detects an external event signal via this pin and wakes up the DA16200 from Sleep mode 2 or Sleep mode 3.

  • Page 28: 5.10 Rtc_Gpo

    ○ The state of RTC_GPO is high when DA16200 is in active and low when DA16200 is in sleep mode 1 or ○ External MCU can use this pin for monitoring whether the DA16200 enters sleep 1 or 2.

  • Page 29: 5.12 Interface Pull-Up

    UM-WI-006 DA16200 DA16600 Hardware Design Guide 5.12 Interface Pull-Up It is an open-drain/open-collector communication standard which implies integrated circuits (IC’s) with different voltage supply rails can be connected for communication. Pull-up resistors need to be connected from the signal lines to the supply to enable communication.

  • Page 30: Sdio

    UM-WI-006 DA16200 DA16600 Hardware Design Guide 5.12.2 SDIO VDD_IO SD_CLK SD_CMD SD_D0 DA16200 SD_D1 SD_D2 SD_D3 Figure 21: SDIO Pull-Up Resistors The recommended pull-up resistor value range is between 10 k and 100 k. In addition, this value affects signal rise time and leakage current.

  • Page 31: 5.13 Pcb Layout

    UM-WI-006 DA16200 DA16600 Hardware Design Guide 5.13 PCB Layout 5.13.1 Grounding ● Make the internal ground area as solid as possible. Do not break the ground into pieces ● Provide good solid ground by using multiple vias ● Fill as much ground as possible in the area between the walls of shield cavities and the outline of the RF section ●...

  • Page 32: Layout Example: Da16200Mod

    UM-WI-006 DA16200 DA16600 Hardware Design Guide 5.13.2 Layout Example: DA16200MOD Top Layer Layer 2 Layer 3 Bottom Layer Figure 23: DA16200MOD 4-Layer PCB Example Revision 1.6 User Manual 12-Jan-2023 CFR0012 32 of 57 © 2023 Renesas Electronics...

  • Page 33: Recommended Footprint

    UM-WI-006 DA16200 DA16600 Hardware Design Guide 5.13.3 Recommended Footprint Unit: mm Pitch: 0.4 0.22 Figure 24: DA16200 Ground Footprint Revision 1.6 User Manual 12-Jan-2023 CFR0012 33 of 57 © 2023 Renesas Electronics...

  • Page 34: Da16600

    UM-WI-006 DA16200 DA16600 Hardware Design Guide DA16600 The DA16600 provides a high level of integration for a battery based wireless system supporting integrated IEEE 802.11 b/g/n and Bluetooth V5.1. The DA16600 is designed to address the needs of battery based devices that require minimal power consumption and reliable operation.

  • Page 35: Pin Description

    UM-WI-006 DA16200 DA16600 Hardware Design Guide Pin Description Table 16: Pin Type Definition #Pin Pin Name Type Drive Reset Related Description (mA) State Device DA14531 Not Connect P0_2 DA14531 General Purpose I/O, JTAG I/F, SWCLK P0_6 DA14531 Internally connected to...
  • Page 36 UM-WI-006 DA16200 DA16600 Hardware Design Guide #Pin Pin Name Type Drive Reset Related Description (mA) State Device DA16200 F_IO1 is internally connected to Flash Memory DA16200 F_CSN is internally connected to Flash Memory DA16200 F_IO2 is internally connected to Flash...
  • Page 37 GPIO as an additional reset function when P0_0 is not available for reset in abnormal situations. This device provides various interfaces to support many kinds of applications. In DA16200, it is possible to control each pin according to the required application in reference to the pin multiplexing illustrated in Table 17.

  • Page 38: Gpio Pin Multiplexing

    GPIO Pin Multiplexing Table 17: DA16600 Pin Multiplexing Within the DA16600 module, various pins of the DA16200 and the DA14531 are internally connected and therefore cannot be used as GPIOs and are marked as TP (test points) on the DA16600MOD package.

  • Page 39: Wi- Fi & Bt Coexistence

    UM-WI-006 DA16200 DA16600 Hardware Design Guide DA16600 DA16200 SPDT DA14531 CO-EX CO-EX Figure 26: DA16600 RF Diagram 6.3.1 WI- FI & BT Coexistence Table 18: Coexistence Connection DA14531 part DA16200 part Function P0_5 GPIOA_8 Wi-Fi_ACT P0_6 GPIOA_9 BT_ACT P0_7 GPIOA_10 BT_PRIO 6.3.2...

  • Page 40: Pcb Layout

    UM-WI-006 DA16200 DA16600 Hardware Design Guide PCB Layout 6.4.1 Layout example: DA16600 Top Layer Layer 2 Layer 3 Bottom Layer Figure 27: DA16600 4-Layer PCB Example Revision 1.6 User Manual 12-Jan-2023 CFR0012 40 of 57 © 2023 Renesas Electronics...

  • Page 41: Recommended Footprint

    UM-WI-006 DA16200 DA16600 Hardware Design Guide 6.4.2 Recommended Footprint Figure 28: DA16600 Ground Footprint Revision 1.6 User Manual 12-Jan-2023 CFR0012 41 of 57 © 2023 Renesas Electronics...

  • Page 42: Appendix A Antenna Diversity Function

    DA16200 DA16600 Hardware Design Guide Appendix A Antenna diversity function The DA16200 and DA16600) provide an antenna switching diversity function to improve antenna performance in a multi-path environment. The PHY HW block measures the Received Signal Strength Indicator (RSSI) of each antenna and selects the antenna with the largest RSSI. The selected antenna is also used for transmission.

  • Page 43: Table 21: Rf_Interface_Control (0X60C0C000)

    UM-WI-006 DA16200 DA16600 Hardware Design Guide This register is responsible for selecting the GPIO ports to use for the RF switch control signals generated by the PHY HW after measuring the RSSI of each antenna. When GPIOA[11] needs to be used for RF_SW2 while GPIOA[10] is used for RF SW1, 0xBA should be set, in which ‘B’...

  • Page 44: Appendix B Hardware Check List

    When creating a schematic, make sure to check the checklist for each application listed below to complete the correct schematic. DA16200 On board B.1.1 Figure 30. QFN Reference for 1.8 V Flash Table 25: DA16200 QFN Check List Pin No. Pin Name Check point 1,47...
  • Page 45 31, 32 GPIOA6~A7 resistors to remove the leakage current. Check part number of serial flash (see supported flash list) Serial flash Noted that DA16200 can support only high-performance flash of MXIC. Interface Assign 1 GPIO for interrupt when SPI or SDIO is used.

  • Page 46: Fccsp

    UM-WI-006 DA16200 DA16600 Hardware Design Guide B.1.2 fcCSP Figure 31. fcCSP Reference for Normal Power Mode with 1.8 V Flash Table 26: DA16200 fcCSP Check List Pin No. Pin Name Check point A1,A9 B6,B10,B C7,C9,C1 D8,D10 E5,E9 F6,F8,F1 0,F12 G5,G7,G H4,H8,H Revision 1.6...
  • Page 47 E1, E3 GPIOA6~A7 resistors to remove the leakage current. Check part number of serial flash (see supported flash list) Serial flash Noted that DA16200 can support only high-performance flash of MXIC. Revision 1.6 User Manual 12-Jan-2023 CFR0012 47 of 57...

  • Page 48: Da16200 Mod

    UM-WI-006 DA16200 DA16600 Hardware Design Guide Pin No. Pin Name Check point Interface Assign 1 GPIO for interrupt when SPI or SDIO is used. (GPIOC6 is assigned as interrupt SPI interrupt by default.) Interface pull- Need pull-up resistors when I2C or SDIO is used.

  • Page 49: Table 27: Da16200Mod Check List For Freertos Sdk

    UM-WI-006 DA16200 DA16600 Hardware Design Guide Table 27: DA16200MOD Check List for FreeRTOS SDK Pin No. Pin Name Check point 1,6,36,37 Not connect VBAT_3V3 Operating voltage 2.1~3.6 V (Typical 3.3 V) VDD_DIO1, 15,34 Check I/O voltage of MCU (1.8~3.3 V) VDD_DIO2 Input high voltage >...

  • Page 50: For Linux Driver

    UM-WI-006 DA16200 DA16600 Hardware Design Guide B.2.2 For Linux driver DA16200MOD 2.1~3.6V VBAT_3V3 VBAT_3V3 1.62~3.6V VDD_DIO1 External Power Control RTC_P WR_KEY VDD_DIO1 Input high voltage of this pin>2.2V @3.3V VDD RTC_W AKE_UP GPIOA0 RTC_SENSOR GPIOA1 SPI_I RQ_TX SPI_IRQ1 GPIOA2 JTAG debug...

  • Page 51: For Freertos Sdk

    UM-WI-006 DA16200 DA16600 Hardware Design Guide DA16600 B.3.1 For FreeRTOS SDK Figure 34. DA16600 Reference for FreeRTOS SDK Table 28: DA16600 Check list for FreeRTOS SDK Pin No. Pin Name Check point Not connect 8,18,19 23,24,2 Test point, do not connect to other components...
  • Page 52 UM-WI-006 DA16200 DA16600 Hardware Design Guide Pin No. Pin Name Check point VDD_DIO1, 17,40 Check I/O voltage of MCU (1.8~3.3 V) VDD_DIO2 Input high voltage > 2.2 V @3.3 V VDD (I/O voltage check) RTC_PWR_KEY Recommend being controlled by MCU, need RC delay circuit (470 kΩ...

  • Page 53: For Linux Driver

    UM-WI-006 DA16200 DA16600 Hardware Design Guide B.3.2 For Linux driver 10uF DA16600MOD VBAT_BLE VBAT_BLE BLE JTAG BLE_SWDIO P0_10 P0_11 P0_5 P0_7 BLE JTAG BLE UART for Debug BLE_SWCLK BLE_DEBUG_RX P0_8 P0_2 BLE UART for Debug BLE_DEBUG_TX P0_6 P0_9 PMOD1_PIN10 (BLE_RESET)
  • Page 54 UM-WI-006 DA16200 DA16600 Hardware Design Guide Pin No. Pin Name Check point BT-Wi-Fi single-wire COEX: BT_ACT, need to connect externally (internally 3,33 P0_6, GPIOA10 connected to SPDT) 2,50 P0_2/10 GPIO of DA14531, can be to assign as JTAG debug port...

  • Page 55: Revision History

    UM-WI-006 DA16200 DA16600 Hardware Design Guide Revision History Revision Date Description 12-Jan-2023 Updated RTC GPO Description in Section 5.10 Updated RTC Clock in Section 2.5.2 Added AN-WI-008 to Appendix A Added HW Check list to Appendix B Added DA16600 part...
  • Page 56 RoHS Compliance Renesas Electronics’ suppliers certify that its products are in compliance with the requirements of Directive 2011/65/EU of the European Parliament on the restriction of the use of certain hazardous substances in electrical and electronic equipment. RoHS certificates from our suppliers are available on request.
  • Page 57 Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing.

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