Da16200 Qfn, 3.3 V Flash Memory; Figure 20: Application Schematic - Qfn, 3.3 V Flash - Renesas DA16200 H/W User Manual

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UM-WI-006
DA16200 H/W Design Guide
3.2

DA16200 QFN, 3.3 V Flash Memory

DA16200 package type: 48-Pin QFN
Operating VDD of flash memory: 3.3 V
DA16200 Tx output power mode: Normal Tx power mode
RF1
C17
L3
L2
C15
C18
C19
Optional (Band=pass filter)
VSS
1
VDD_ANA
2
R1
C1
RBIAS
3
RF_XI
4
C2
RF_XO
C3
5
TMS
6
TCLK
7
GPIOC8
8
GPIOC7
9
GPIOC6
10
UART_TXD
11
UART_RXD
12
VDD_DIO2
(1.8V ~ 3.3V)
Figure 20: Application Schematic – QFN, 3.3 V Flash
An additional load switch (U1) to control the flash VDD is needed to reduce the power
consumption in sleep mode
VDD_DIO1/2 should be same level with I/O voltage of external IC such as MCU
Remove R3 and C12 when external MCU controls 'RTC_PWR_KEY'
User Manual
CFR0012
C13
C12
R4
DA16200
QFN
C4
C5
R2
VDD_FDIO
(Connect to External Flash)
Revision 1.5
32 of 44
Note: Remove R3 and C12 when MCU controls RTC_PWR_KEY
C11
C10
GPIOA3
36
VDD_DIO1
35
GPIOA4
34
GPIOA5
33
GPIOA6
32
GPIOA7
31
GPIOA8
30
GPIOA9
29
GPIOA10
28
GPIOA11
27
DCDC_FB
26
DCDC_LX
25
C7
R5
C6
RTC_GPO (High/Low)
U1
NDA Confidential
VDD_DIO1
(1.8V ~ 3.3V)
C9
L1
C8
VBAT (3.3V)
11-Apr-2022
© 2022 Renesas Electronics

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