Rf Input Requirements; Clock; Rf Main Clock (40 Mhz); Figure 8: Lc Filter Circuit - Renesas DA16200 H/W User Manual

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UM-WI-006
DA16200 H/W Design Guide
Below is the consideration for the antenna part.
1. Put the antenna on the edge or corner of the PCB.
2. Signal lines must not be routed across the antenna elements on any layer of the PCB.
3. The ground is needed for copper keep-out on all layers, including inner layers.
4. Matching components for the antenna are needed to optimize each board.
5. The return loss measured at the matching components of the antenna needs to be better
than -10 dB to get the optimum system performance.
2.4.3

RF Input Requirements

The RF part must have matching components and an RF filter to suppress any harmonic element.
A passive filter which is made by lumped components can meet the system requirements because
the DA16200 has good harmonic suppression performance.

Figure 8: LC Filter Circuit

The RF line needs to be isolated by using ground plane with clearance to ensure good performance
(output power, EVM, SEM and sensitivity).
2.5

Clock

2.5.1

RF Main Clock (40 MHz)

The DA16200 has a crystal oscillator for the main clock source, which supports the external crystal
clock. Basically, the external clock is 40 MHz. Make sure that the load capacitance is tuned based on
the board parasitic so that the frequency tolerance is within ±20 ppm. And the clock line needs to
route closer to the XTAL routing to avoid any phase noise degradation.
The recommended operating conditions are given in

Table 4: WLAN Crystal Clock Requirements

Parameter
Frequency
Frequency accuracy
Crystal ESR
Load Capacitance
(Note
Note 1
Not exceed ±20 ppm, there is an internal adjustable shunt capacitor inside the chipset, which must be
written to the OTP block after crystal correction. There is a 0~12.7 pF tunable capacitor inside the
DA16200, to use without shunt capacitors outside, it must be selected a crystal with a load
capacitance of 6~10 pF.
User Manual
CFR0012
Condition
Initial + temp + aging
1)
Revision 1.5
16 of 44

Figure 9: LC Filter Layout

Table
4.
Min
Typ
40
-20
6
8
NDA Confidential
Max
Units
MHz
+20
ppm
50
10
pF
11-Apr-2022
© 2022 Renesas Electronics

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