Garmin LIDAR-Lite v1 Silver Label Operating Manual page 32

Preamp off
Clock Disable
FPGA Sleep
Det. Off
Summary
Preamp off​ : Shutting down the preamp disables the 3.7 V regulator supporting the preamplifier circuitry.
The power is stable in 1­ 2 ms after re­enabling after shutdown. The advantage for powering down the
preamp between measurements is reduced power consumption and less thermal rise above ambient
temperature when operating at low pulse rates 1­10 Hz.
Clock Disable​ : Is not used in the LIDAR­Lite product. On high performance long range products a crystal
oscillator reference is included on the circuit board
FPGA Sleep​ : Disables the phase lock loop (PLL) based internal clock, resulting in the shutdown of all the
internal circuitry, except for I2C interface. The I2C interface still monitors buss activity and when its address
is detected it initiates the activation of the internal clock. The wake­up time is necessary for the PLL to
re­lock on its internal frequency reference.
Detector Off​ : Shuts off the on­board charge­pump generating the 8 V bias to the photodiode. Disabling
the charge­pump has negligible impact on power consumption, however it eliminates the last of the periodic
potential noise sources on the board.
LIDAR­Lite v1 "Silver Label" Manual​ , Updated: 08/13/15
30 mA 2 ms
10 mA 1 ms
40 mA 10 ms
1 mA 1 ms