Switch and Jumper Settings
Figure 2-2. Switch and Jumper Locations
Table 2-2. Clock Mode Select Switch (SW10)
CLKDBL
Pins 1 & 2
Not installed
Not installed
Not installed
Installed
Installed
Installed
2-6
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CLK_CFG1
CLK_CFG0
Pins 3 & 4
Pins 5 & 6
Installed
Installed
Installed
Not installed
Not installed
Installed
Installed
Installed
Installed
Not installed
Not installed
Installed
ADSP-21161N EZ-KIT Lite Evaluation System Manual
Core Clock
External Port
Ratio
Clock Ratio
2:1
1x
3:1
1x
4:1
1x (default)
4:1
2x
6:1
2x
8:1
2x
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