System Architecture
information on how to configure the width of the SDRAM. Refer to
"SDRAM Memory" on page 1-9
map.
Some of the address, data, and control signals are available externally via
two off-board connectors. The EP connector pinout (
found in
"ADSP-21161N EZ-KIT Lite Schematic" on page
Host Processor Interface (HPI)
The host port interface (HPI) signals are brought to an unpopulated
off-board connector (
application. The pinout of the host port connector can be found in
"ADSP-21161N EZ-KIT Lite Schematic" on page
SPORT Audio Interface
and
SPORT0
SPORT2
jack and four RCA mono jacks facilitate an audio input, while a 3.5 mm
stereo jack and eight RCA mono jacks facilitate an audio output.
The codec contains two input channels. One channel connects to a
3.5 mm stereo jack and two RCA jacks. The 3.5 mm stereo jack connects
to a microphone. The two RCA jacks can connect to a
audio device. You can supply an audio input to the codec microphone
input channel (
settings determine whether the
connector
or
J2
SPI Audio Interface
The serial port connector (SPI) connects to the AD1836, AD1852, and
the S/PDIF receiver (CS8416). The SPI port is used for writing and read-
ing the control registers of the audio devices.
2-4
www.BDTIC.com/ADI
for a summary of the processor's memory
). This allows the HPI to interface with a user
P10
connect to the AD1836 codec (
) or to the
MIC1
LINE-IN
LINE-IN
.
J3
ADSP-21161N EZ-KIT Lite Evaluation System Manual
and
P9
B-1.
). A 3.5 mm stereo
U10
LINE_OUT
input channel. The
channel of the codec is driven by
) can be
P10
B-1.
from an
jumper
JP11
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