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4.3.8.2
LVDS Advanced options submenu
Using this submenu, it is possible to set all the following parameters to meet the LVDS display requirements.
Menu Item
LVDS Spreading Depth
LVDS Output Swing
T3 Timing
T4 Timing
T12 Timing
T2 Delay
T5 Delay
P/N Pairs Swapping
Pairs Order Swapping
LVDS BUS Swapping
4.3.9
Chipset configuration submenu
Menu Item
PCI 64-bit Decode
CRID
ETX-A61
ETX-A61 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.2 - Author: S.B. - Reviewed by G.G. Copyright © 2017 SECO S.r.l.
Options
Description
No Spreading / 0.5% / 1.0% /
Sets percentage of bandwidth of LVDS clock frequency for spreading spectrum
1.5% / 2.0% / 2.5%
150 mV / 200 mV / 250 mV /
300 mV / 350 mV / 400 mV /
Sets the LVDS differential output swing
450 mV
Minimum T3 timing of panel power sequence to enforce (expressed in units of 50ms). Default is 10
0 ÷ 255
(500ms)
Minimum T4 timing of panel power sequence to enforce (expressed in units of 50ms). Default is 2
0 ÷ 255
(100ms)
0 ÷ 255
Minimum T12 timing of panel power sequence to enforce (expressed in units of 50ms). Default is 20 (1s)
Enabled / Disabled
When Enabled, T2 is delayed by 20ms ± 50%
Enabled / Disabled
When Enabled, T5 is delayed by 20ms ± 50%
Enable or disable LVDS Differential pairs swapping (Positive Negative)
Enabled / Disabled
Enable or disable channel differential pairs order swapping (A D, B CLK, C C)
Enabled / Disabled
Enable or disable Bus swapping (Odd Even)
Enabled / Disabled
Options
Description
Enabled / Disabled
Allow the system to support 64-bit BAR (Base Address Register) for PCI devices.
Enabled / Disabled
Enable or disable the Compatibility Revision ID (CRID) feature
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