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3.2.5.3
Audio interface signals (connector X1 - CN6)
The ETX-A61 module supports HD audio format, thanks to native support offered by the processor to this audio codec standard.
A Realtek ALC262 HD audio coded is embedded onboard. By using this codec, the ETX-A61 module is able to support the following audio signals.
SNDL/SNDR: Left and Right stereo output, ~1Vrms.
AUXAL/AUXAR: Left and Right auxiliary inputs, ~1Vrms
MIC: Microphone Input, ~1Vrms
ASGND: Analog ground reference. To be used on the carrier board for definition of an analog plane where tracing all audio signals.
3.2.5.4
ISA Signals (connector X2 - CN5)
Since the SOCs used on ETX-A61 module doesn't offer native support for ISA bus (which is required by ETX
an LPC to ISA bridge (Fintek F85226AF).
All signals are 5V voltage tolerant.
Here following the signals related to the ISA Bus.
SD[0..15]: 16-bit System data bus, TTL bidirectional signals with 8k2Ω pull-up resistor to +5V_S.
SA[0..19]: System address bus, TTL bidirectional signals with 8k2Ω pull-up resistor to +5V_S. This bus allows addressing up to 1MB of ISA I/O space.
LA[17..23]: Latched address bus, TTL bidirectional signals with 8k2Ω pull-up resistor to +5V_S. Along with signals SA[0..16], this bus is used to address memory
space up to 16MB.
SBHE#: System Byte High Enable, TTL bidirectional signal. It is asserted when a byte is transferred on data bus SD[8..15].
BALE: Bus Address Latch Enable, TTL bidirectional signal. It indicates that SA[0..19] bus, LA[17..23] bus and SBHE# signal are valid.
AEN: Address Enable, +5V tolerant output with 24mA source-sink capability. It indicates that a DMA cycle is currently performed.
MEMR#: Memory Read, TTL bidirectional signal with 8k2Ω pull-up resistor to +5V_S. It is used to indicate that the current cycle is a memory read.
SMEMR#: System Memory Read, TTL output with 1kΩ pull-up resistor at +5V_S. It is used to indicate that the current cycle is a system memory read under 1MB.
MEMW#: Memory Write, TTL bidirectional signal with 8k2Ω pull-up resistor to +5V_S. It is used to indicate that the current cycle is a memory write.
SMEMW#: System Memory Write, TTL output with 1kΩ pull-up resistor at +5V_S. It is used to indicate that the current cycle is a system memory write access
under 1MB.
IOR#: I/O Read, TTL bidirectional signal with 8k2Ω pull-up resistor to +5V_S. It is asserted to request an ISA I/O slave to drive data onto the data bus.
ETX-A61
ETX-A61 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.2 - Author: S.B. - Reviewed by G.G. Copyright © 2017 SECO S.r.l.
®
specifications), this kind of interface is realised using
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