Video Input (Ppi0); Uart Port; Expansion Interface - Analog Devices ADSP-BF561 EZ-KIT Lite Manual

System Architecture

Video Input (PPI0)

The interface is configured as input and connects to the on-board
PPI0
video decoder device, ADV7183A. The ADV7183A decoder receives three
analog video channels on
data outputs
P15
clock output can be selected to drive any of the PPI clocks as shown in
Table 2-7 on page
Synchronization outputs of the decoder,
can connect to the processor's
FIELD
flag via the
SW2
(SW2)" on page

UART Port

The processor's universal asynchronous receiver/transmitter (UART) port
connects to the ADM3202 RS-232 line driver as well as to the expansion
interface. The RS-232 line driver is attached to the
providing an interface to a personal computer and other serial devices.

Expansion Interface

The expansion interface consists of the three 90-pin connectors,
Table 2-3 shows the interfaces each connector provides. For the exact
pinout of the connectors, refer to
on page B-1. The mechanical dimensions of the connectors can be
obtained from Technical or Customer
2-8
www.BDTIC.com/ADI
,
AIN1 AIN4
drive the inputs
8 PPI0
–
2-13.
DIP switch, as described in
2-10.
"ADSP-BF561 EZ-KIT Lite Schematic"
ADSP-BF561 EZ-KIT Lite Evaluation System Manual
, and input. The decoder's pixel
AIN5
. The decoder's 27 MHz pixel
8–0
,
HS/HACTIVE VS/VACTIVE
_ ,
PPI0 SYNC1 PPI0_SYNC2
"Video Configuration Switch
DB9
Support.
, and
, and
PF3
male connector,
.
J1–3