communication method of the IIC bus. The EEPROM I2C signal is connected
to the IO port of the FPGA. Figure 14-1 below shows the design of the
EEPROM.
EEPROM Pin Assignment
EEPROM_I2C_SCL
EEPROM_I2C_SDA
Part 15: Digital Tube
The AX7035 development board has 6 digital tubes for displaying digital
information. The digital tube we use is a 6-in-one eight-segment digital tube,
and the segment structure of a digital tube is shown in Figure 15-1.
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ARTIX-7 FPGA Development Board AX7035 User Manual
Figure 14-1: EEPROM Schematic
Figure 14-2: EEPROM on the FPGA Board
Pin Name
Amazon Store:
Sales Email:
FPGA Pin
N18
N19
https://www.amazon.com./alinx
rachel.zhou@aithtech.com
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