Part 5: 50M Active Crystal Oscillator - Alinx AX7035 User Manual

Xilinx artix-7 fpga

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Table Of Contents

Table of Contents

The main parameters of the FPGA chip XC7A35T are as follows

Logic Cells

CLB flip-flops

Block RAM（kb）

DSP Slices

Speed Grade

Temperature Grade

FPGA power supply system

Artix-7 FPGA power supplies are V

. V

is the FPGA core power supply pin, which needs to be connected

MGTAVTT

CCINT

to 1.0V; V

is the power supply pin of FPGA block RAM, connect to 1.0V;

CCBRAM

is FPGA auxiliary power supply pin, connect 1.8V; V

CCAUX

each BANK of FPGA, including BANK0, BANK14~16, BANK34~35. On

AX7035 FPGA development board, BANK34 need to be connected to DDR3,

the voltage connection of BANK is 1.5V, and the voltage of other BANK is 3.3V.

The V

of BANK16 is powered by the LDO, and can be changed by replacing

CCO

the LDO chip. Because the GTP transceiver function is not used here, the

development board does not provide GTP power.

The Artix-7 FPGA system requires that the power-up sequence be

, then V

CCINT

have the same voltage, they can be powered up at the same time. The order of

power outages is reversed.