GE PACSystems RXi User Manual page 164

The COMMREQ Command Block
The Command Block contains the details of a command to be performed by the Interface.
The address in CPU memory of the Command Block is specified by the IN input of the
COMMREQ function block. This address can be any valid address within a word-oriented
area of memory. The Command Block is usually set up using either the BLOCK MOVE or the
DATA INIT COMM programming instruction. The Command Block has the following structure:
When entering information for the Command Block, refer to these definitions:
(Word 1) Data Block Length: This is the length in words of the Data Block portion of the
Command Block. The Data Block portion starts at Word 7 of the Command Block. The length
is measured from the beginning of the Data Block at Word 7, not from the beginning of the
Command Block. The correct value for each command, and the associated length of each
command, is specified in the next section.
(Word 2) WAIT/NOWAIT Flag: This flag must be set to zero for TCP/IP Ethernet communications.
COMMREQ Status Word (CRS): The Ethernet interface updates the CRS word to show success
or failure of the command. Command words 3 and 4 specify the CPU memory location of the
CRS word.
(Word 3) COMMREQ Status Word Memory Type: This word specifies the memory type for the CRS
word. The memory types are listed in the table below:
Type
%R
%AI
%AQ
%I
%Q
%T
%M
%G
%W
(Word 4) COMMREQ Status Word Address Offset: This word contains the offset within the memory
type selected. The status word address offset is a zero-based number. For example, if
you want %R1 as the location of the CRS word, you must specify a zero for the offset. The
offset for %R100 would be 99 decimal. Note that this is the only zero-based field in the
Channel commands.
(Word 5): Reserved. Set to zero.
(Word 6): Reserved. Set to zero.
GFK-2816F
Chapter 8. Gigabit Ethernet (GbE) Interface Overview and Operation
Word 1 Data Block Length (words)
Word 2 WAIT/NOWAIT Flag
Word 3 CRS Word Memory Type
Word 4 CRS Word Address Offset
Word 5 Reserved
Word 6 Reserved
Words 7 and up Data Block (Channel Command Details)
Value Value
(Decimal) (Hex)
8
10
12
16
70
18
72
20
74
22
76
56
86
196
08H Register memory (word mode)
0AH Analog input memory (word mode)
0CH Analog output memory (word mode)
10H Discrete input memory (byte mode)
46H Discrete input memory (bit mode)
12H Discrete output memory (byte mode)
48H Discrete output memory (bit mode)
14H Discrete temporary memory (byte mode)
4AH Discrete temporary memory (bit mode)
16H Discrete momentary internal memory (byte mode)
4CH Discrete momentary internal memory (bit mode)
38H Discrete global data table (byte mode)
56H Discrete global data table (bit mode)
C4H Word memory (word mode limited to %W1 - %W65536)
August 2015
Description
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