Northern Telecom DMS-100 Series Maintenance Manual page 232

9-2 List of terms
Comprises all Central Control functions of the DMS-100. It consists of the
Central Message Controller, CPU, and Data Store.
CPU
Central Processor Unit
CTC
Counter Timer Circuit
A circuit on the DPP CPU PCA that handles vectored interrupts from
various devices within the DPP that request access to the data bus for data
transfer.
DIRP
Device Independent Recording Package
Software which automatically directs data from the various administrative
and maintenance facilities to the appropriate recording devices.
DMA
Direct Memory Access
The use of special hardware for transferring data to and from memory to
reduce the number of interrupts required for program data transfers.
DPP
Distributed Processing Peripheral
A peripheral device of the DMS-100 that functions as an AMA data
collector and an AMA transmitter in the AMATPS of the DMS-100. The
DPP collects AMA data from the DIRP, formats the data (BCS25-28), stores
the data on its own internal disk, and transmits the data to a data collection
center when polled by the collection center. The DPP performs the AMAT
functions independently of the DMS-100, thereby off-loading the AMA T
functions from the DMS-100 CC.
DRAM
Dynamic Random Access Memory
A Random Access Memory system that employs transistor capacitor storage
cells. The logic state is stored in the capacitor and buffered by the transistor.
The capacitive charge is only held for a short duration and must be refreshed
at a periodic rate to maintain its programmed state.
DSI
Data Stream Interface
297-1001-537 Standard 01.02 December 1993