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Chapter 1: Introduction
20
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Table 1-5: Ethernet Interface Pin Assignments (Cont'd)
FPGA Pin
Description
AD12
PHY_RXD_2
AD16
PHY_RXD_3
AD10
PHY_RXD_4
AC22
PHY_RXD_5
AF22
PHY_RXD_6
AF15
PHY_RXD_7
9. Ethernet Port
10Base-T, 100Base-TX, and 1000Base-T (Gigabit) Ethernet port. Connected to the
Ethernet PHY
("8. Ethernet
10. Flash Memory
Intel StrataFlash embedded memory JS28F256P30B95; provides the development
board with 32-MB flash memory. This memory provides non-volatile storage for data,
software, or bitstreams. The device is 16-bits wide. This flash memory can also be used
to program the FPGA. To use the Flash and ZBT memories, the memory enable pin
must be set in the FPGA.
Note: The FMC module 1 cannot be used when using ZBT or flash memory. Make sure
that the FMC adjustable power supply no. 1 is configured for 3.3V to use the ZBT or
flash memory. See FMC expansion connector for information about how to configure
the adjustable power supply. The Flash memory shares the same address/data bus as
the ZBT synchronous SRAM
Table 1-6: Memory Enable Pin Assignment
FPGA Pin
R9
MEM_EN_B
11. PS/2 Connectors
The Spartan-3A DSP 3400A Edition board is equipped with two PS/2 connectors, one
each for a keyboard and mouse. Bi-directional level shifting transistors allow the 1.8-V
I/O to interface with the 5-V I/O of the PS/2 connectors, which are powered directly
from the 5-V power source of the development board. Connector J17 is used to connect
a mouse, and connector J14 is used to connect a keyboard.
assignments.
www.xilinx.com
FPGA Pin
AF9
AE8
AF8
Y14
V13
PHY").
Table 1-6
identifies the pin assignment.
("12. ZBT Synchronous
Signal
0: memory is accessible
1: memory is not accessible
Spartan-3A DSP 3400A Edition User Guide
Description
PHY_TXD_5
PHY_TXD_6
PHY_TXD_7
PHY_TX_CLK
PHY_TX_ER
SRAM").
Description
Table 1-7
identifies the pin
UG498 (v2.2) November 17, 2008
R
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