Xilinx XtremeDSP Spartan-3A DSP 3400A HW-SD3400A-DSP-DB-UNI-G User Manual page 21

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Spartan-3A DSP 3400A Edition User Guide
UG498 (v2.2) November 17, 2008
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Note: Be sure that the power load of the connected PS/2 devices does not overload the
AC adapter of the development board.
Table 1-7: PS/2 Pin Assignments
FPGA Pin
R17
KEYBOARD_CLK
R18
KEYBOARD_DATA
H21
MOUSE_CLK
J21
MOUSE_DATA
12. ZBT Synchronous SRAM
ISSI IS61NLP25636A-200TQL. The ZBT synchronous SRAM is high-speed, low-
latency external memory for the FPGA. The memory is organized as 256K × 36 bits,
providing a 32-bit data bus supporting four parity bits. The ZBT synchronous SRAM
shares the same data bus as the flash memory
Note: FMC module #1 cannot be used when using ZBT synchronous SRAM. Make
sure that FMC #1 adjustable power supply is configured for 3.3V to use the memory.
See
"14. FMC Expansion Connector #1"
adjustable power supply.
13. Soft Touch Connector
The Soft Touch connector (J12) lets you monitor signals between the FPGA and the
FMC expansion connector #1.
Table 1-8: Soft Touch Connector Pin Assignments
Soft Touch Pin
FPGA Pin
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
www.xilinx.com
Spartan-3A DSP 3400A Edition Board Hardware
Description
("10. Flash
for information about configuring the
Table 1-8
defines the pin assignments.
H2
FMC_LA03_P
H1
FMC_LA03_N
NC
GND
J5
FMC_LA14_P
J4
FMC_LA14_N
NC
GND
L4
FMC_LA06_P
L3
FMC_LA06_N
NC
GND
P8
FMC_LA32_P
P9
FMC_LA32_N
NC
GND
U1
FMC_LA28_P
U2
FMC_LA28_N
Memory").
Description
21

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