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Programming the IDT Clock Chip
Downloading to the Spartan-3A DSP 3400A Edition Board
Spartan-3A DSP 3400A Edition User Guide
UG498 (v2.2) November 17, 2008
Downloaded from
Elcodis.com
electronic components distributor
R
The XtremeDSP Development Platform - Spartan-3A DSP 3400A Edition evaluation board
features an Integrated Device Technology (IDT) 3.3V EEPROM Programmable Clock
Generator that is pre-programmed at the factory. In the event the chip programming is
changed, the instructions in this appendix show how to return the clock chip to its factory
default settings using the following equipment:
• Xilinx download cable
• JTAG flying wires
1.
Connect a Xilinx download cable to the board using flying leads connected to jumper
P2.
X-Ref Target - Figure 3-1
2.
From the Windows Start menu, choose iMPACT to open the main iMPACT window.
3.
Click Boundary Scan; then right-click Add Xilinx Device.
4.
Locate the SVF file (s3adsp_clock_setup.svf as illustrated in
CLK Prog
P2
3.3V
1
GND
2
TCK
3
TDO
4
TDI
5
TMS
6
Figure 3-1: P2 IDT5V9885 JTAG Connector
www.xilinx.com
Chapter 3
Figure
3-2) and click Open.
47
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